Order register classes by spill size first, members last.

This is still a topological ordering such that every register class gets
a smaller enum value than its sub-classes.

Placing the smaller spill sizes first makes a difference for the
super-register class bit masks. When looking for a super-register class,
we usually want the smallest possible kind of super-register. That is
now available as the first bit set in the bit mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156222 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp
index a9eed98a5b561ffad28935bf0cacd7a124139f34..03073a18c12d1c7659d11680ec69fb23f145d6b6 100644 (file)
--- a/utils/TableGen/CodeGenRegisters.cpp
+++ b/utils/TableGen/CodeGenRegisters.cpp
@@ -611,13 +611,6 @@ static int TopoOrderRC(const void *PA, const void *PB) {
   if (A == B)
     return 0;
 
-  // Order by descending set size.  Note that the classes' allocation order may
-  // not have been computed yet.  The Members set is always vaild.
-  if (A->getMembers().size() > B->getMembers().size())
-    return -1;
-  if (A->getMembers().size() < B->getMembers().size())
-    return 1;
-
   // Order by ascending spill size.
   if (A->SpillSize < B->SpillSize)
     return -1;
@@ -630,6 +623,13 @@ static int TopoOrderRC(const void *PA, const void *PB) {
   if (A->SpillAlignment > B->SpillAlignment)
     return 1;
 
+  // Order by descending set size.  Note that the classes' allocation order may
+  // not have been computed yet.  The Members set is always vaild.
+  if (A->getMembers().size() > B->getMembers().size())
+    return -1;
+  if (A->getMembers().size() < B->getMembers().size())
+    return 1;
+
   // Finally order by name as a tie breaker.
   return StringRef(A->getName()).compare(B->getName());
 }