Teach the address selector to make 'reg+reg' addressing modes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19457 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp
index f2edb651ae0420fbf9e258c6388a09013a3eb0c6..bd0607721580f1216c9ea3a83c1488431d729161 100644 (file)
--- a/lib/Target/X86/X86ISelPattern.cpp
+++ b/lib/Target/X86/X86ISelPattern.cpp
@@ -443,9 +443,18 @@ bool ISel::SelectAddress(SDOperand N, X86AddressMode &AM) {
   }
   }
 
-  if (AM.BaseType != X86AddressMode::RegBase ||
-      AM.Base.Reg)
+  // Is the base register already occupied?
+  if (AM.BaseType != X86AddressMode::RegBase || AM.Base.Reg) {
+    // If so, check to see if the scale index register is set.
+    if (AM.IndexReg == 0) {
+      AM.IndexReg = SelectExpr(N);
+      AM.Scale = 1;
+      return false;
+    }
+
+    // Otherwise, we cannot select it.
     return true;
+  }
 
   // Default, generate it as a register.
   AM.BaseType = X86AddressMode::RegBase;