ARM: at91: add clk_lookup entry for RTT devices
authorBoris BREZILLON <boris.brezillon@free-electrons.com>
Tue, 23 Sep 2014 11:18:33 +0000 (13:18 +0200)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Thu, 13 Nov 2014 15:08:01 +0000 (16:08 +0100)
First export the clk32k clk.
Then add clk_lookup entries for RTT devices so that rtc-at91sam9 driver
can retrieve and manipulate the slow clk.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Johan Hovold <johan@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-at91/clock.c
arch/arm/mach-at91/clock.h

index aab1f969a7c3f6bba1b2d51824c34e3e28a2f13d..990b82fdd409052f6354544b26e73133d803e7e2 100644 (file)
@@ -217,6 +217,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc_clk),
        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),
+       CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),
        /* more usart lookup table for DT entries */
        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
        CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
@@ -237,6 +238,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
        CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
        CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),
        /* fake hclk clock */
        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
        CLKDEV_CON_ID("pioA", &pioA_clk),
index a8bd35963332f540bdcac00e87f04d09f121b805..a23b3cfbc6aff2d96471331b8a40c4175d7e0642 100644 (file)
@@ -192,6 +192,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_ID("pioA", &pioA_clk),
        CLKDEV_CON_ID("pioB", &pioB_clk),
        CLKDEV_CON_ID("pioC", &pioC_clk),
+       CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),
        /* more lookup table for DT entries */
        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
        CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
@@ -209,6 +210,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
index fbff228cc63ed5e54da7c97f79f140083845dc6d..1082fd488263ae900016e4420a6e3dda14dd97d0 100644 (file)
@@ -201,6 +201,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
        CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),
+       CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),
+       CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.1", &clk32k),
        /* fake hclk clock */
        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
        CLKDEV_CON_ID("pioA", &pioA_clk),
@@ -227,6 +229,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),
+       CLKDEV_CON_DEV_ID(NULL, "fffffd50.rtc", &clk32k),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
index 405427ec05f8a923f153fa9d384071fd8f3ef72a..9c4c4cebfdf116ac4abada62343fbfccf0e86b38 100644 (file)
@@ -254,6 +254,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk),
        CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk),
        CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),
+       CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),
        /* more usart lookup table for DT entries */
        CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
        CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
@@ -280,6 +281,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),
 
        CLKDEV_CON_ID("pioA", &pioA_clk),
        CLKDEV_CON_ID("pioB", &pioB_clk),
index f553e4ea034bade189daebc308c79343939aa813..40c815c627426bcfea07d17ef13a5bc3b15a112f 100644 (file)
@@ -205,6 +205,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_ID("pioB", &pioB_clk),
        CLKDEV_CON_ID("pioC", &pioC_clk),
        CLKDEV_CON_ID("pioD", &pioD_clk),
+       CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),
        /* more lookup table for DT entries */
        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
        CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
@@ -223,6 +224,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),
        CLKDEV_CON_ID("adc_clk", &tsc_clk),
 };
 
index d66f102c352abd9e44956952ed6d7ee2430f241e..f569e48268485f2646cc4d45eee2c087dac0e345 100644 (file)
@@ -115,7 +115,7 @@ static u32 at91_pllb_usb_init;
  * 48 MHz (unless no USB function clocks are needed).  The main clock and
  * both PLLs are turned off to run in "slow clock mode" (system suspend).
  */
-static struct clk clk32k = {
+struct clk clk32k = {
        .name           = "clk32k",
        .rate_hz        = AT91_SLOW_CLOCK,
        .users          = 1,            /* always on */
index a98a39bbd8839e446e6be44defd9bdb4cd615358..6eb825abbdde86e41843a91aca6aea8a607076e7 100644 (file)
@@ -34,6 +34,7 @@ struct clk {
 extern int __init clk_register(struct clk *clk);
 extern struct clk mck;
 extern struct clk utmi_clk;
+extern struct clk clk32k;
 
 #define CLKDEV_CON_ID(_id, _clk)                       \
        {                                               \