writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
if (gic_arch_extn.irq_mask)
gic_arch_extn.irq_mask(d);
-#ifdef CONFIG_ARCH_RK29
+#if defined(CONFIG_PLAT_RK) && !defined(CONFIG_SMP)
dsb();
#endif
spin_unlock(&irq_controller_lock);
if (gic_arch_extn.irq_unmask)
gic_arch_extn.irq_unmask(d);
writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
-#ifdef CONFIG_ARCH_RK29
+#if defined(CONFIG_PLAT_RK) && !defined(CONFIG_SMP)
dsb();
#endif
spin_unlock(&irq_controller_lock);
}
writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
-#ifdef CONFIG_ARCH_RK29
+#ifdef CONFIG_PLAT_RK
dsb();
#endif
}
{
int ret = -ENXIO;
-#ifdef CONFIG_ARCH_RK29
+#ifdef CONFIG_PLAT_RK
return 0;
#endif
if (gic_arch_extn.irq_set_wake)