Merge branch 'for-arm-soc' into for-next

diff --cc arch/arm/kernel/sleep.S
Simple merge

diff --cc arch/arm/mm/proc-v7.S
index 003190ae9cd8bc9897e2eb10e06bbb74c56ce66e,75ae72160099a5b3b4f439f62b1f43f02e936073..0716bbe198728876e81361897b69258e3489bf24
--- 1/arch/arm/mm/proc-v7.S
--- 2/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@@ -414,16 -336,17 +414,16 @@@ __v7_pj4b_setup
  __v7_setup:
        adr     r12, __v7_setup_stack           @ the local stack
        stmia   r12, {r0-r5, r7, r9, r11, lr}
-       bl      v7_flush_dcache_louis
+       bl      v7_invalidate_l1
        ldmia   r12, {r0-r5, r7, r9, r11, lr}
  
 -      mrc     p15, 0, r0, c0, c0, 0           @ read main ID register
 -      and     r10, r0, #0xff000000            @ ARM?
 -      teq     r10, #0x41000000
 -      bne     3f
 -      and     r5, r0, #0x00f00000             @ variant
 -      and     r6, r0, #0x0000000f             @ revision
 -      orr     r6, r6, r5, lsr #20-4           @ combine variant and revision
 -      ubfx    r0, r0, #4, #12                 @ primary part number
 +      and     r0, r9, #0xff000000             @ ARM?
 +      teq     r0, #0x41000000
 +      bne     __errata_finish
 +      and     r3, r9, #0x00f00000             @ variant
 +      and     r6, r9, #0x0000000f             @ revision
 +      orr     r6, r6, r3, lsr #20-4           @ combine variant and revision
 +      ubfx    r0, r9, #4, #12                 @ primary part number
  
        /* Cortex-A8 Errata */
        ldr     r10, =0x00000c08                @ Cortex-A8 primary part number