ethernet:gmac support phy irq for rtl8211e (disabled as default)
authorcz <cz@rock-chips.com>
Thu, 9 Oct 2014 06:44:19 +0000 (14:44 +0800)
committercz <cz@rock-chips.com>
Thu, 9 Oct 2014 06:45:09 +0000 (14:45 +0800)
arch/arm/boot/dts/rk3128-box.dts
drivers/net/ethernet/rockchip/gmac/stmmac.h
drivers/net/ethernet/rockchip/gmac/stmmac_platform.c
drivers/net/phy/realtek.c

index e70d2de375652adba163fb18c09e14f72c178e42..41ac561944d56c0b34f41a935de09c58634ed162 100755 (executable)
        //pmu_enable_level = <1>; //1->HIGH, 0->LOW
        //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
        reset-gpio = <&gpio2 GPIO_D0 GPIO_ACTIVE_LOW>;
+       phyirq-gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
        phy-mode = "rgmii";
        clock_in_out = "input";
        tx_delay = <0x30>;
index ec6050bba7eb726b03cb0e34bb5f38957af57ad8..fffc14dedc714665c13490686b95dd8017cfe2c2 100755 (executable)
@@ -123,6 +123,8 @@ struct bsp_priv {
        int power_io_level;
        int reset_io;
        int reset_io_level;
+       int phyirq_io;
+       int phyirq_io_level;
        int phy_iface;
        bool clock_input;
        int chip;
index b9cc4da35bf083f2c6ce746fd8ddd441ed5ebbed..ad11b948ee7e0f2c88e20a7f6ef2f3b917538ac9 100755 (executable)
@@ -377,6 +377,7 @@ int stmmc_pltfr_init(struct platform_device *pdev) {
        int phy_iface;
        int err;
        struct bsp_priv *bsp_priv;
+       int irq;
 
        pr_info("%s: \n", __func__);
 
@@ -413,6 +414,36 @@ int stmmc_pltfr_init(struct platform_device *pdev) {
                        pr_err("%s: ERROR: Request gmac phy reset pin failed.\n", __func__);
                }
        }
+
+       if (bsp_priv->phyirq_io > 0) {
+               err = gpio_request(bsp_priv->phyirq_io, "gmac_phyirq");
+               if (err < 0) {
+                       printk("gmac_phyirq: failed to request GPIO %d,"
+                               " error %d\n", bsp_priv->phyirq_io, err);
+               } else {
+                       err = gpio_direction_input(bsp_priv->phyirq_io);
+                       if (err < 0) {
+                               pr_err("gmac_phyirq: failed to configure input"
+                                       " direction for GPIO %d, error %d\n",
+                               bsp_priv->phyirq_io, err);
+                               gpio_free(bsp_priv->phyirq_io);
+                       } else {
+                               irq = gpio_to_irq(bsp_priv->phyirq_io);
+                               if (irq < 0) {
+                                       err = irq;
+                                       pr_err("gpio-keys: Unable to get irq number for GPIO %d, error %d\n", bsp_priv->phyirq_io, err);
+                                       gpio_free(bsp_priv->phyirq_io);
+                               } else {
+                                       struct plat_stmmacenet_data *plat_dat = dev_get_platdata(&pdev->dev);
+                                       if (plat_dat)
+                                               plat_dat->mdio_bus_data->probed_phy_irq = irq;
+                                       else
+                                               pr_err("%s: plat_data is NULL\n", __func__);
+                               }
+                       }
+               }
+       }
+
 //rmii or rgmii
        if (phy_iface == PHY_INTERFACE_MODE_RGMII) {
                pr_info("%s: init for RGMII\n", __func__);
@@ -554,6 +585,10 @@ static int stmmac_probe_config_dt(struct platform_device *pdev,
                g_bsp_priv.rx_delay = value;
        }
 
+       g_bsp_priv.phyirq_io =
+                       of_get_named_gpio_flags(np, "phyirq-gpio", 0, &flags);
+       g_bsp_priv.phyirq_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
+
        g_bsp_priv.reset_io = 
                        of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
        g_bsp_priv.reset_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
@@ -636,6 +671,9 @@ static int stmmac_pltfr_probe(struct platform_device *pdev)
                        pr_err("%s: main dt probe failed", __func__);
                        return ret;
                }
+
+               pdev->dev.platform_data = plat_dat;
+
        } else {
                plat_dat = pdev->dev.platform_data;
        }
index 8e7af8354342c9ce6440e3131aad536fbe385c87..6cdc0996204c054b0ff02efe12e36d2f9f616463 100644 (file)
@@ -23,7 +23,7 @@
 #define RTL821x_INER_INIT      0x6400
 #define RTL821x_INSR           0x13
 
-#define        RTL8211E_INER_LINK_STAT 0x10
+#define        RTL8211E_INER_LINK_STAT 0x400
 
 MODULE_DESCRIPTION("Realtek PHY driver");
 MODULE_AUTHOR("Johnson Leung");
@@ -61,6 +61,7 @@ static int rtl8211e_config_intr(struct phy_device *phydev)
        else
                err = phy_write(phydev, RTL821x_INER, 0);
 
+       phy_read(phydev, RTL821x_INSR);
        return err;
 }