powerpc/tm: Fix context switching TAR, PPR and DSCR SPRs

commit 28e61cc466d8daace4b0f04ba2b83e0bd68f5832 upstream.

If a transaction is rolled back, the Target Address Register (TAR), Processor
Priority Register (PPR) and Data Stream Control Register (DSCR) should be
restored to the checkpointed values before the transaction began.  Any changes
to these SPRs inside the transaction should not be visible in the abort
handler.

Currently Linux doesn't save or restore the checkpointed TAR, PPR or DSCR.  If
we preempt a processes inside a transaction which has modified any of these, on
process restore, that same transaction may be aborted we but we won't see the
checkpointed versions of these SPRs.

This adds checkpointed versions of these SPRs to the thread_struct and adds the
save/restore of these three SPRs to the treclaim/trechkpt code.

Without this if any of these SPRs are modified during a transaction, users may
incorrectly see a speculated SPR value even if the transaction is aborted.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 14a658363698ee1d58e0b400b33b3bbc13475dda..419e7125cce275ea3c875e2b9efecc666987e060 100644 (file)
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -247,6 +247,10 @@ struct thread_struct {
        unsigned long   tm_orig_msr;    /* Thread's MSR on ctx switch */
        struct pt_regs  ckpt_regs;      /* Checkpointed registers */
 
+       unsigned long   tm_tar;
+       unsigned long   tm_ppr;
+       unsigned long   tm_dscr;
+
        /*
         * Transactional FP and VSX 0-31 register set.
         * NOTE: the sense of these is the opposite of the integer ckpt_regs!

diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 6f16ffafa6f01542d54ccc684c3f8d5d7d6add5c..302886b77de2337819b907b4c90ccc446cc6d2a9 100644 (file)
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -139,6 +139,9 @@ int main(void)
        DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
        DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
        DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
+       DEFINE(THREAD_TM_TAR, offsetof(struct thread_struct, tm_tar));
+       DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr));
+       DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr));
        DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
        DEFINE(THREAD_TRANSACT_VR0, offsetof(struct thread_struct,
                                         transact_vr[0]));

diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index 2da67e7a16d58650e10a0b6113b705bd88a6f2d3..1edd6c2a168d45f88fc2b138e1a61a734289ed64 100644 (file)
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -224,6 +224,16 @@ dont_backup_fp:
        std     r5, _CCR(r7)
        std     r6, _XER(r7)
 
+
+       /* ******************** TAR, PPR, DSCR ********** */
+       mfspr   r3, SPRN_TAR
+       mfspr   r4, SPRN_PPR
+       mfspr   r5, SPRN_DSCR
+
+       std     r3, THREAD_TM_TAR(r12)
+       std     r4, THREAD_TM_PPR(r12)
+       std     r5, THREAD_TM_DSCR(r12)
+
        /* MSR and flags:  We don't change CRs, and we don't need to alter
         * MSR.
         */
@@ -338,6 +348,16 @@ dont_restore_fp:
        mtmsr   r6                              /* FP/Vec off again! */
 
 restore_gprs:
+
+       /* ******************** TAR, PPR, DSCR ********** */
+       ld      r4, THREAD_TM_TAR(r3)
+       ld      r5, THREAD_TM_PPR(r3)
+       ld      r6, THREAD_TM_DSCR(r3)
+
+       mtspr   SPRN_TAR,       r4
+       mtspr   SPRN_PPR,       r5
+       mtspr   SPRN_DSCR,      r6
+
        /* ******************** CR,LR,CCR,MSR ********** */
        ld      r3, _CTR(r7)
        ld      r4, _LINK(r7)