[PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs
authorCatalin Marinas <catalin.marinas@arm.com>
Thu, 30 Jun 2005 16:04:14 +0000 (17:04 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 30 Jun 2005 16:04:14 +0000 (17:04 +0100)
Patch from Catalin Marinas

This patch fixes the V bit setting for the ARM1020x processors. At
reset, this bit is automatically set to the value of the HIVECSINIT
input signal which just happened to be 1 but it is not mandatory.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mm/proc-arm1020.S
arch/arm/mm/proc-arm1020e.S

index e69f1940ab39de0a24c578bf458723747c54f10e..5c0ae5260d1cabef383c37d2dbe9cbc4da70f470 100644 (file)
@@ -445,14 +445,14 @@ __arm1020_setup:
        /*
         *  R
         * .RVI ZFRS BLDP WCAM
-        * .0.1 1001 ..11 0101  FIXME: why no V bit?
+        * .011 1001 ..11 0101
         */
        .type   arm1020_cr1_clear, #object
        .type   arm1020_cr1_set, #object
 arm1020_cr1_clear:
        .word   0x593f
 arm1020_cr1_set:
-       .word   0x1935
+       .word   0x3935
 
        __INITDATA
 
index 142a2c2d6f0bfe7b22f3ca1c72abcacc071db814..d69389c4d4ba5410f9e13323313270bc01e14183 100644 (file)
@@ -427,14 +427,14 @@ __arm1020e_setup:
        /*
         *  R
         * .RVI ZFRS BLDP WCAM
-        * .0.1 1001 ..11 0101  /* FIXME: why no V bit? */
+        * .011 1001 ..11 0101
         */
        .type   arm1020e_cr1_clear, #object
        .type   arm1020e_cr1_set, #object
 arm1020e_cr1_clear:
        .word   0x5f3f
 arm1020e_cr1_set:
-       .word   0x1935
+       .word   0x3935
 
        __INITDATA