ARM: S5P: Add SROM control register shift macros for other banks.

This patch adds shift macros for the SROM Bus width and control
register to represent the shift count for the 5th and 6th SROM
banks.  Some of the S5P SOCs have them.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/plat-s5p/include/plat/regs-srom.h b/arch/arm/plat-s5p/include/plat/regs-srom.h
index 0fdac48a59853b4872590b81eeaade36b20cb601..06189dac87bc810096edbd3957fd9349605f943f 100644 (file)
--- a/arch/arm/plat-s5p/include/plat/regs-srom.h
+++ b/arch/arm/plat-s5p/include/plat/regs-srom.h
@@ -36,6 +36,8 @@
 #define S5P_SROM_BW__NCS1__SHIFT               4
 #define S5P_SROM_BW__NCS2__SHIFT               8
 #define S5P_SROM_BW__NCS3__SHIFT               12
+#define S5P_SROM_BW__NCS4__SHIFT               16
+#define S5P_SROM_BW__NCS5__SHIFT               20
 
 /* applies to same to BCS0 - BCS3 */