expose DWARF_LABEL opcode# so the branch folder can update debug info properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31024 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 794117058c83a4e1e0c0e63a8839215d7f89fc0c..e74cb138ab01674ab1e5e42a2eeeeb1a3d57c0e4 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -219,6 +219,13 @@ public:
     return get(Opcode).Flags & M_VARIABLE_OPS;
   }
 
+  /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+  /// instruction if it has one.  This is used by codegen passes that update
+  /// DWARF line number info as they modify the code.
+  virtual unsigned getDWARF_LABELOpcode() const {
+    return 0;
+  }
+  
   /// Return true if the instruction is a register to register move
   /// and leave the source and dest operands in the passed parameters.
   virtual bool isMoveInstr(const MachineInstr& MI,

diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h
index 265e1e76c2f3a36caf4b2596a7613e36d057e3b9..dc16aed4dc282e9b5cf8b0ed5aa207311c0d9e64 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/lib/Target/PowerPC/PPCInstrInfo.h
@@ -77,6 +77,13 @@ public:
   /// This is used for addressing modes.
   virtual const TargetRegisterClass *getPointerRegClass() const;  
 
+  /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+  /// instruction if it has one.  This is used by codegen passes that update
+  /// DWARF line number info as they modify the code.
+  virtual unsigned getDWARF_LABELOpcode() const {
+    return PPC::DWARF_LABEL;
+  }
+  
   // Return true if the instruction is a register to register move and
   // leave the source and dest operands in the passed parameters.
   //

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 939b8691c432f3c004a24aa7dfbf70ef5220a86f..65321616bf6d0f4277f4304bc7f80c7ece545967 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -25,6 +25,13 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
     TM(tm), RI(tm, *this) {
 }
 
+/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+/// instruction if it has one.  This is used by codegen passes that update
+/// DWARF line number info as they modify the code.
+unsigned X86InstrInfo::getDWARF_LABELOpcode() const {
+  return X86::DWARF_LABEL;
+}
+
 
 bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
                                unsigned& sourceReg,

diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h
index 3e0694f8b3fa86388c3b95a1f7c6f6f00cfca6b3..4ceb98d17979151b6210b78c5b66cdabaa72ad21 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.h
+++ b/lib/Target/X86/X86InstrInfo.h
@@ -205,6 +205,11 @@ public:
   unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
   unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
   
+  /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+  /// instruction if it has one.  This is used by codegen passes that update
+  /// DWARF line number info as they modify the code.
+  virtual unsigned getDWARF_LABELOpcode() const;
+  
   /// convertToThreeAddress - This method must be implemented by targets that
   /// set the M_CONVERTIBLE_TO_3_ADDR flag.  When this flag is set, the target
   /// may be able to convert a two-address instruction into a true