+++ /dev/null
-/*
- * Copyright (C) 2013 ROCKCHIP, Inc.
- * Author: lintao <lintao@rock-chips.com>
- * Bangwang Xie <xbw@rock-chips.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include<dt-bindings/mmc/rockchip-sdmmc.h>
-
-
-/{
- emmc: rksdmmc@1021C000 {
- compatible = "rockchip,rk_mmc";
- reg = <0x1021C000 0x4000>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;/*irq=57*/
- #address-cells = <1>;
- #size-cells = <0>;
- //pinctrl-names = "default",,"suspend";
- //pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>;
- clocks = <&clk_gates2 14>;
- clock-frequency = <50000000>;
- clock-freq-min-max = <400000 50000000>;
-
- num-slots = <1>;
- supports-highspeed;
- supports-emmc;
- bootpart-no-access;
- fifo-depth = <0x80>;
- bus-width = <4>;
-
- //mmc,caps = <(MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)>;
- // mmc,ocr = <(MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
- // MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
- // MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36)>;
- // mmc,use_dma = <MMC_USE_DMA 2>;
- // mmc,dma_ch = <EMMC_DMA_CHN>;
- // mmc,int = <CONTROLLER_INT_DETECT>;
- // mmc,emmc_is_selected = <1>;
- status = "okay";
- };
-
- sdmmc: rksdmmc@10214000 {
- compatible = "rockchip,rk_mmc";
- reg = <0x10214000 0x4000>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; /*irq=55*/
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default","suspend";
- pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>;
- pinctrl-1 = <&sd0_cd_gpio>; //for int gpio?
- clocks = <&clk_gates2 11>;
- clock-frequency = <50000000>;
- clock-freq-min-max = <400000 50000000>;
-
- num-slots = <1>;
- supports-highspeed;
- supports-sd;
- broken-cd;
- card-detect-delay = <200>;
- pwr-gpios = <&gpio3 GPIO_A1 GPIO_ACTIVE_LOW>; /*pwr_en = GPIO3_A1*/
- fifo-depth = <0x100>;
- bus-width = <4>;
-
-
- status = "okay";
- };
-
-
- sdio: rksdmmc@10218000 {
- compatible = "rockchip,rk_mmc";
- reg = <0x10218000 0x4000>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default","suspend";
- pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>;
-
- clocks = <&clk_gates2 13>;
- clock-frequency = <50000000>;
- clock-freq-min-max = <200000 50000000>;
-
- num-slots = <1>;
- supports-highspeed;
- supports-sdio;
- fifo-depth = <0x100>;
- bus-width = <4>;
-
- mmc,caps = <(MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ |MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)>;
- mmc,ocr = <(MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
- MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
- MMC_VDD_33_34 | MMC_VDD_34_35 )>;
- //mmc,use_dma = <MMC_USE_DMA 1>;
- //mmc,dma_ch = <SDIO_DMA_CHN>;
- //mmc,int = <CONTROLLER_INT_DETECT>;
- ////mmc,int = <GPIO_INT_DETECT>;
- ////OOB pin?
- //mmc,emmc_is_selected = <0>;
- status = "disabled";
- };
-
-
-};