interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates1 5>, <&clk_gates5 13>;
clock-names = "clk_usbphy0", "hclk_usb0";
+ /*0 - Normal, 1 - Force Host, 2 - Force Device*/
+ rockchip,usb-mode = <0>;
};
usb1: usb@101c0000 {
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
/*clocks = <&clk_gates13 4>, <&clk_gates7 4>;*/
/*clock-names = "clk_usbphy0", "hclk_usb0";*/
+ /*0 - Normal, 1 - Force Host, 2 - Force Device*/
+ rockchip,usb-mode = <0>;
};
usb1: usb@ff540000 {
{
int retval = 0;
int irq;
+ uint32_t val;
struct resource *res_base;
dwc_otg_device_t *dwc_otg_device;
struct device *dev = &_dev->dev;
* we do core soft reset after connection detected.
*/
dwc_otg_core_init_no_reset(dwc_otg_device->core_if);
- dwc_otg_device->core_if->usb_mode = 0;// TODO: Can be read from Device-Tree
+
+ /* set otg mode
+ * 0 - USB_MODE_NORMAL
+ * 1 - USB_MODE_FORCE_HOST
+ * 2 - USB_MODE_FORCE_DEVICE
+ */
+ of_property_read_u32(node, "rockchip,usb-mode", &val);
+ dwc_otg_device->core_if->usb_mode = val;
+
#ifndef DWC_HOST_ONLY
/*
* Initialize the PCD
dwc_otg_hcd_set_priv_data(dwc_otg_hcd, hcd);
dwc_otg_hcd->host_enabled = 1;
- if(dwc_otg_is_host_mode(otg_dev->core_if)){
+ if(dwc_otg_is_host_mode(otg_dev->core_if) ||
+ (otg_dev->core_if->usb_mode == USB_MODE_FORCE_HOST)){
dwc_otg_hcd->connect_detect_timer.function = otg20_hcd_connect_detect;
dwc_otg_hcd->connect_detect_timer.data = (unsigned long)(dwc_otg_hcd);
init_timer( &dwc_otg_hcd->connect_detect_timer);
wake_lock_init(&pcd->wake_lock, WAKE_LOCK_SUSPEND, "usb_pcd");
- if(dwc_otg_is_device_mode(pcd->core_if)){
+ if(dwc_otg_is_device_mode(pcd->core_if) &&
+ (otg_dev->core_if->usb_mode != USB_MODE_FORCE_HOST)){
#ifdef CONFIG_RK_USB_UART
if(pldata->get_status(USB_STATUS_BVABLID)){
//enter usb phy mode