ARM: keystone: dts: fix typo in the ddr3 pllclk node name

Fix following typo
 ddr3allclk -> ddr3apllclk
 ddr3bllclk -> ddr3bpllclk

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi
index 67e70ec410d67f6c8d45e8d5627346d6be67eaa6..2a2f247a9263560d3a9ecd017abe1b7c125c9fa6 100644 (file)
--- a/arch/arm/boot/dts/keystone-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-clocks.dtsi
@@ -31,7 +31,7 @@ clocks {
                reg-names = "control";
        };
 
-       ddr3allclk: ddr3apllclk@2620360 {
+       ddr3apllclk: ddr3apllclk@2620360 {
                #clock-cells = <0>;
                compatible = "ti,keystone,pll-clock";
                clocks = <&refclkddr3a>;
@@ -40,7 +40,7 @@ clocks {
                reg-names = "control";
        };
 
-       ddr3bllclk: ddr3bpllclk@2620368 {
+       ddr3bpllclk: ddr3bpllclk@2620368 {
                #clock-cells = <0>;
                compatible = "ti,keystone,pll-clock";
                clocks = <&refclkddr3b>;