SDValue &Base,
SDValue &OffImm) {
SDLoc dl(N);
+ const DataLayout &DL = CurDAG->getDataLayout();
+ const TargetLowering *TLI = getTargetLowering();
+ if (N.getOpcode() == ISD::FrameIndex) {
+ int FI = cast<FrameIndexSDNode>(N)->getIndex();
+ Base = CurDAG->getTargetFrameIndex(FI, TLI->getPointerTy(DL));
+ OffImm = CurDAG->getTargetConstant(0, dl, MVT::i64);
+ return true;
+ }
+
// As opposed to the (12-bit) Indexed addressing mode below, the 7-bit signed
// selected here doesn't support labels/immediates, only base+offset.
if ((RHSC & (Size - 1)) == 0 && RHSC >= (-0x40 << Scale) &&
RHSC < (0x40 << Scale)) {
Base = N.getOperand(0);
+ if (Base.getOpcode() == ISD::FrameIndex) {
+ int FI = cast<FrameIndexSDNode>(Base)->getIndex();
+ Base = CurDAG->getTargetFrameIndex(FI, TLI->getPointerTy(DL));
+ }
OffImm = CurDAG->getTargetConstant(RHSC >> Scale, dl, MVT::i64);
return true;
}
define void @test_stnp_v4f32_offset_alloca(<4 x float> %v) #0 {
; CHECK-LABEL: test_stnp_v4f32_offset_alloca:
-; CHECK: mov x29, sp
-; CHECK: mov x[[PTR:[0-9]+]], sp
-; CHECK-NEXT: stnp d0, d{{.*}}, [x[[PTR]]]
+; CHECK: stnp d0, d{{.*}}, [sp]
; CHECK-NEXT: mov x0, sp
; CHECK-NEXT: bl _dummy
%tmp0 = alloca <4 x float>
define void @test_stnp_v4f32_offset_alloca_2(<4 x float> %v) #0 {
; CHECK-LABEL: test_stnp_v4f32_offset_alloca_2:
-; CHECK: mov x29, sp
-; CHECK: mov x[[PTR:[0-9]+]], sp
-; CHECK-NEXT: stnp d0, d{{.*}}, [x[[PTR]], #16]
+; CHECK: stnp d0, d{{.*}}, [sp, #16]
; CHECK-NEXT: mov x0, sp
; CHECK-NEXT: bl _dummy
%tmp0 = alloca <4 x float>, i32 2