add support for integer extloads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24840 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td
index bdcb1a2457a56c1b273778e073783c839e26e01b..7ace4e9f2be6148e0d720e5847d84542e6014690 100644 (file)
--- a/lib/Target/Sparc/SparcInstrInfo.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -713,3 +713,12 @@ def : Pat<(V8lo tconstpool:$in), (ORri G0, tconstpool:$in)>;
 
 // Return of a value, which has an input flag.
 def : Pat<(retflag ICC/*HACK*/), (RETL)>;
+
+// Map integer extload's to zextloads.
+// Handling 1 bit extload
+def : Pat<(i32 (extload ADDRrr:$src, i1)), (LDUBrr ADDRrr:$src)>;
+def : Pat<(i32 (extload ADDRri:$src, i1)), (LDUBri ADDRri:$src)>;
+def : Pat<(i32 (extload ADDRrr:$src, i8)), (LDUBrr ADDRrr:$src)>;
+def : Pat<(i32 (extload ADDRri:$src, i8)), (LDUBri ADDRri:$src)>;
+def : Pat<(i32 (extload ADDRrr:$src, i16)), (LDUHrr ADDRrr:$src)>;
+def : Pat<(i32 (extload ADDRri:$src, i16)), (LDUHri ADDRri:$src)>;

diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td
index bdcb1a2457a56c1b273778e073783c839e26e01b..7ace4e9f2be6148e0d720e5847d84542e6014690 100644 (file)
--- a/lib/Target/SparcV8/SparcV8InstrInfo.td
+++ b/lib/Target/SparcV8/SparcV8InstrInfo.td
@@ -713,3 +713,12 @@ def : Pat<(V8lo tconstpool:$in), (ORri G0, tconstpool:$in)>;
 
 // Return of a value, which has an input flag.
 def : Pat<(retflag ICC/*HACK*/), (RETL)>;
+
+// Map integer extload's to zextloads.
+// Handling 1 bit extload
+def : Pat<(i32 (extload ADDRrr:$src, i1)), (LDUBrr ADDRrr:$src)>;
+def : Pat<(i32 (extload ADDRri:$src, i1)), (LDUBri ADDRri:$src)>;
+def : Pat<(i32 (extload ADDRrr:$src, i8)), (LDUBrr ADDRrr:$src)>;
+def : Pat<(i32 (extload ADDRri:$src, i8)), (LDUBri ADDRri:$src)>;
+def : Pat<(i32 (extload ADDRrr:$src, i16)), (LDUHrr ADDRrr:$src)>;
+def : Pat<(i32 (extload ADDRri:$src, i16)), (LDUHri ADDRri:$src)>;