spi: xtensa-xtfpga: fix register endianness
authorMax Filippov <jcmvbkbc@gmail.com>
Tue, 22 Sep 2015 11:32:03 +0000 (14:32 +0300)
committerMark Brown <broonie@kernel.org>
Tue, 22 Sep 2015 16:30:10 +0000 (09:30 -0700)
XTFPGA SPI controller has native endian registers.
Fix register acessors so that they work in big-endian configurations.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
drivers/spi/spi-xtensa-xtfpga.c

index 2e32ea2f194f3f0d92c4410be212d65b4be75b0d..be6155cba9de721b4a4ff6983bc6d8bc1e37ed3f 100644 (file)
@@ -34,13 +34,13 @@ struct xtfpga_spi {
 static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
                                      unsigned addr, u32 val)
 {
-       iowrite32(val, spi->regs + addr);
+       __raw_writel(val, spi->regs + addr);
 }
 
 static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
                                             unsigned addr)
 {
-       return ioread32(spi->regs + addr);
+       return __raw_readl(spi->regs + addr);
 }
 
 static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)