Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
// Scalar Absolute Difference
-def int_aarch64_neon_vabd : Neon_2Arg_Intrinsic;
+def int_aarch64_neon_vabd :
+ Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem]>;
// Scalar Negate Value
def int_aarch64_neon_vneg :
(INSTS FPR32:$Rn, FPR32:$Rm)>;
}
+multiclass Neon_Scalar3Same_fabd_SD_size_patterns<SDPatternOperator opnode,
+ Instruction INSTS,
+ Instruction INSTD> {
+ def : Pat<(f32 (opnode (f32 FPR32:$Rn), (f32 FPR32:$Rm))),
+ (INSTS FPR32:$Rn, FPR32:$Rm)>;
+ def : Pat<(f64 (opnode (f64 FPR64:$Rn), (f64 FPR64:$Rm))),
+ (INSTD FPR64:$Rn, FPR64:$Rm)>;
+}
+
multiclass Neon_Scalar3Same_SD_size_patterns<SDPatternOperator opnode,
Instruction INSTS,
Instruction INSTD> {
// Scakar Floating-point Absolute Difference
defm FABD: NeonI_Scalar3Same_SD_sizes<0b1, 0b1, 0b11010, "fabd">;
-defm : Neon_Scalar3Same_SD_size_patterns<int_aarch64_neon_vabd,
- FABDsss, FABDddd>;
+defm : Neon_Scalar3Same_fabd_SD_size_patterns<int_aarch64_neon_vabd,
+ FABDsss, FABDddd>;
// Scalar Absolute Value
defm ABS : NeonI_Scalar2SameMisc_D_size<0b0, 0b01011, "abs">;
; CHECK-LABEL: test_vabds_f32
; CHECK: fabd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
entry:
- %vabd.i = insertelement <1 x float> undef, float %a, i32 0
- %vabd1.i = insertelement <1 x float> undef, float %b, i32 0
- %vabd2.i = call <1 x float> @llvm.aarch64.neon.vabd.v1f32(<1 x float> %vabd.i, <1 x float> %vabd1.i)
- %0 = extractelement <1 x float> %vabd2.i, i32 0
+ %0 = call float @llvm.aarch64.neon.vabd.f32(float %a, float %a)
ret float %0
}
; CHECK-LABEL: test_vabdd_f64
; CHECK: fabd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
entry:
- %vabd.i = insertelement <1 x double> undef, double %a, i32 0
- %vabd1.i = insertelement <1 x double> undef, double %b, i32 0
- %vabd2.i = call <1 x double> @llvm.aarch64.neon.vabd.v1f64(<1 x double> %vabd.i, <1 x double> %vabd1.i)
- %0 = extractelement <1 x double> %vabd2.i, i32 0
+ %0 = call double @llvm.aarch64.neon.vabd.f64(double %a, double %b)
ret double %0
}
-declare <1 x double> @llvm.aarch64.neon.vabd.v1f64(<1 x double>, <1 x double>)
-declare <1 x float> @llvm.aarch64.neon.vabd.v1f32(<1 x float>, <1 x float>)
+declare double @llvm.aarch64.neon.vabd.f64(double, double)
+declare float @llvm.aarch64.neon.vabd.f32(float, float)