For expression like
authorZhou Sheng <zhousheng00@gmail.com>
Tue, 13 Mar 2007 06:40:59 +0000 (06:40 +0000)
committerZhou Sheng <zhousheng00@gmail.com>
Tue, 13 Mar 2007 06:40:59 +0000 (06:40 +0000)
"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35080 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Transforms/Scalar/InstructionCombining.cpp

index 5dbc5240e8bfe64450fc5ebf99f495029b30663a..bd88fccc22ee70dd1f1e1ddcc3a1c958e423b591 100644 (file)
@@ -1995,7 +1995,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
       RHSKnownZero <<= ShiftAmt;
       RHSKnownOne  <<= ShiftAmt;
       // low bits known zero.
-      RHSKnownZero |= APInt::getAllOnesValue(ShiftAmt).zext(BitWidth);
+      RHSKnownZero |= APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth);
     }
     break;
   case Instruction::LShr:
@@ -2012,7 +2012,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
       assert((RHSKnownZero & RHSKnownOne) == 0 && 
              "Bits known to be one AND zero?"); 
       // Compute the new bits that are at the top now.
-      APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zext(BitWidth).shl(
+      APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth).shl(
               BitWidth - ShiftAmt));
       RHSKnownZero &= TypeMask;
       RHSKnownOne  &= TypeMask;
@@ -2046,7 +2046,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
       assert((RHSKnownZero & RHSKnownOne) == 0 && 
              "Bits known to be one AND zero?"); 
       // Compute the new bits that are at the top now.
-      APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zext(BitWidth).shl(
+      APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth).shl(
               BitWidth - ShiftAmt));
       RHSKnownZero &= TypeMask;
       RHSKnownOne  &= TypeMask;