clk: rockchip: rk3288: fix rk3288-clocks.dtsi
authordkl <dkl@rock-chips.com>
Mon, 31 Mar 2014 06:06:12 +0000 (14:06 +0800)
committerdkl <dkl@rock-chips.com>
Mon, 31 Mar 2014 06:06:12 +0000 (14:06 +0800)
arch/arm/boot/dts/rk3288-clocks.dtsi

index a2b48dee651a4d5aae7dbbb3ffd61ab0d1ab9c9f..506043697b88ea8d623027fb148fa9eac684450b 100755 (executable)
                                clock-frequency = <0>;
                        };
 
+                       hsadc_0_tsp: hsadc_0_tsp {
+                               compatible = "rockchip,rk-fixed-clock";
+                               #clock-cells = <0>;
+                               clock-output-names = "hsadc_0_tsp";
+                               clock-frequency = <0>;
+                       };
+
+                       hsadc_1_tsp: hsadc_1_tsp {
+                               compatible = "rockchip,rk-fixed-clock";
+                               #clock-cells = <0>;
+                               clock-output-names = "hsadc_1_tsp";
+                               clock-frequency = <0>;
+                       };
+
                };
 
                fixed_factor_cons {
                                                <&clk_crypto>,          <&clk_nandc0>,
                                                <&clk_nandc1>,          <&clk_gpu>,
 
-                                               <&pclk_pd_pmu>,         <&dummy>,
-                                               <&dummy>,               <&xin32k>,
+                                               <&pclk_pd_pmu>,         <&xin24m>,
+                                               <&xin24m>,              <&xin32k>,
 
                                                <&xin24m>,              <&xin24m>,
-                                               <&usbphy_480m>,         <&dummy>;
+                                               <&usbphy_480m>,         <&xin24m>;
 
                                        clock-output-names =
                                                "g_clk_mac_rx",         "g_clk_mac_tx",
                                                <&hclk_peri>,           <&hclk_peri>,
                                                <&hclk_peri>,           <&hclk_peri>,
 
-                                               <&hclk_peri>,           <&dummy>,
-                                               <&dummy>,               <&dummy>,
+                                               <&hclk_peri>,           <&hsadc_0_tsp>,
+                                               <&hsadc_1_tsp>,         <&io_27m_in>,
 
                                                <&aclk_peri>,           <&dummy>,
                                                <&dummy>,               <&dummy>;
                                                <&pclk_bus>,            <&pclk_bus>,
                                                <&pclk_bus>,            <&pclk_bus>,
 
-                                               <&aclk_bus>,            <&dummy>,
-                                               <&dummy>,               <&dummy>,
+                                               <&aclk_bus>,            <&aclk_bus>,
+                                               <&aclk_bus>,            <&aclk_bus>,
 
                                                <&hclk_bus>,            <&hclk_bus>,
                                                <&hclk_bus>,            <&hclk_bus>,
                                                <&xin24m>,              <&xin32k>,
 
                                                <&aclk_bus_src>,                <&xin12m>,
-                                               <&dummy>,               <&dummy>,
+                                               <&xin24m>,              <&xin24m>,
 
                                                <&dummy>,               <&aclk_hevc>,
                                                <&clk_hevc_cabac>,              <&clk_hevc_core>;