clk: rockchip: rk3328: add more flags for dclk_lcdc

Add CLK_SET_RATE_PARENT and CLK_SET_RATE_NO_REPARENT
for dclk_lcdc.

Change-Id: I19a4a8e5f9e2cc5fda8b70f1b632dccd538e02a0
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c
index 6dd120b0f8cf91407e37a830041fd58f8d7e7a9b..a095821412cbca601a6db282ad8c66085f64a57c 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3328.c
+++ b/drivers/clk/rockchip/clk-rk3328.c
@@ -603,7 +603,7 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
                        RK3328_CLKGATE_CON(5), 6, GFLAGS),
        DIV(DCLK_HDMIPHY, "dclk_hdmiphy", "dclk_lcdc_src", 0,
                        RK3328_CLKSEL_CON(40), 3, 3, DFLAGS),
-       MUX(DCLK_LCDC, "dclk_lcdc", mux_dclk_lcdc_p, 0,
+       MUX(DCLK_LCDC, "dclk_lcdc", mux_dclk_lcdc_p,  CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
                        RK3328_CLKSEL_CON(40), 1, 1, MFLAGS),
 
        /*