static void rk312x_restart(char mode, const char *cmd)
{
+ u32 boot_flag, boot_mode;
+
+ rockchip_restart_get_boot_mode(cmd, &boot_flag, &boot_mode);
+
+ writel_relaxed(boot_flag, RK_GRF_VIRT + RK312X_GRF_OS_REG4); // for loader
+ writel_relaxed(boot_mode, RK_GRF_VIRT + RK312X_GRF_OS_REG5); // for linux
+ dsb();
+
+ /* pll enter slow mode */
+ writel_relaxed(0x30110000, RK_CRU_VIRT + RK312X_CRU_MODE_CON);
+ dsb();
+ writel_relaxed(0xeca8, RK_CRU_VIRT + RK312X_CRU_GLB_SRST_SND_VALUE);
+ dsb();
}
DT_MACHINE_START(RK3126_DT, "Rockchip RK3126")
#define RK3036_CRU_SOFTRSTS_CON_CNT (9)
#define RK3036_CRU_SOFTRSTS_CON(i) (RK3036_CRU_SOFTRST_CON + ((i) * 4))
+#define RK312X_CRU_MODE_CON 0x0040
+#define RK312X_PLL_CONS(id, i) ((id) * 0x10 + ((i) * 4))
+
+#define RK312X_CRU_GLB_SRST_FST_VALUE 0x00100
+#define RK312X_CRU_GLB_SRST_SND_VALUE 0x00104
+#define RK312X_CRU_MISC_CON 0x00134
+#define RK312X_CRU_GLB_CNT_TH 0x00140
+#define RK312X_CRU_GLB_RST_ST 0x00150
+#define RK312X_CRU_SDMMC_CON0 0x01c0
+#define RK312X_CRU_SDMMC_CON1 0x01c4
+#define RK312X_CRU_SDIO_CON0 0x01c8
+#define RK312X_CRU_SDIO_CON1 0x01cc
+#define RK312X_CRU_EMMC_CON0 0x01d8
+#define RK312X_CRU_EMMC_CON1 0x01dc
+#define RK312X_CRU_PLL_PRG_EN 0x01f0
+
+#define RK312X_CRU_RST_ST 0x00160
+#define RK312X_CRU_PLL_MASK_CON 0x001f0
+
+#define RK312X_CRU_CLKSEL_CON 0x44
+#define RK312X_CRU_CLKGATE_CON 0xd0
#define RK312X_CRU_SOFTRST_CON 0x110
+#define RK312X_CRU_CLKSELS_CON_CNT (35)
+#define RK312X_CRU_CLKSELS_CON(i) (RK3036_CRU_CLKSEL_CON + ((i) * 4))
+
+#define RK312X_CRU_CLKGATES_CON_CNT (11)
+#define RK312X_CRU_CLKGATES_CON(i) (RK3036_CRU_CLKGATE_CON + ((i) * 4))
+
#define RK312X_CRU_SOFTRSTS_CON_CNT (9)
#define RK312X_CRU_SOFTRSTS_CON(i) (RK312X_CRU_SOFTRST_CON + ((i) * 4))