static void __init clk_enable_init_clocks(void)
{
- clk_enable_nolock(&clk_hclk_cpu_display);
- clk_enable_nolock(&clk_aclk_ddr_gpu);
- clk_enable_nolock(&clk_hclk_disp_matrix);
- clk_enable_nolock(&clk_aclk_disp_matrix);
- clk_enable_nolock(&clk_aclk_ddr_lcdc);
clk_enable_nolock(&clk_nandc);
clk_enable_nolock(&clk_aclk_cpu_peri);
clk_enable_nolock(&clk_aclk_ddr_peri);
pmu_set_power_domain(PD_VCODEC, false);
// pmu_set_power_domain(PD_DISPLAY, false);
-// pmu_set_power_domain(PD_GPU, false);
+ pmu_set_power_domain(PD_GPU, false);
return 0;
}
PD_MINI,
};
+static inline bool pmu_power_domain_is_on(enum pmu_power_domain pd)
+{
+ return !(readl(RK29_PMU_BASE + PMU_PD_ST) & (1 << pd));
+}
+
static inline void pmu_set_power_domain(enum pmu_power_domain pd, bool on)
{
unsigned long flags;
else
writel(readl(RK29_PMU_BASE + PMU_PD_CON) | (1 << pd), RK29_PMU_BASE + PMU_PD_CON);
local_irq_restore(flags);
-}
-static inline bool pmu_power_domain_is_on(enum pmu_power_domain pd)
-{
- return !(readl(RK29_PMU_BASE + PMU_PD_ST) & (1 << pd));
+ while (pmu_power_domain_is_on(pd) != on)
+ ;
}
#endif
return;
pr_debug("power domain on\n");
pmu_set_power_domain(PD_VCODEC, true);
- udelay(10); // max 5358 ns
- while (!pmu_power_domain_is_on(PD_VCODEC)) {
- pr_debug("waiting for on\n");
- msleep(1);
- }
clk_enable(aclk_vepu);
clk_enable(hclk_vepu);
clk_enable(aclk_ddr_vepu);
}
clk_enable(clk_aclk_gpu);
+ clk_enable(clk_get(NULL, "aclk_ddr_gpu"));
+
// clk_gpu
clk_gpu = clk_get(NULL, "gpu");
if (IS_ERR(clk_gpu))
struct clk * clk_gpu = clk_get(NULL, "gpu");
struct clk * clk_aclk_gpu = clk_get(NULL, "aclk_gpu");
+ struct clk * clk_aclk_ddr_gpu = clk_get(NULL, "aclk_ddr_gpu");
struct clk * clk_hclk_gpu = clk_get(NULL, "hclk_gpu");
if(Clock) {
- if(!IS_ERR(clk_hclk_gpu)) clk_enable(clk_hclk_gpu);
- if(!IS_ERR(clk_aclk_gpu)) clk_enable(clk_aclk_gpu);
- if(!IS_ERR(clk_gpu)) clk_enable(clk_gpu);
+ clk_enable(clk_hclk_gpu);
+ clk_enable(clk_aclk_gpu);
+ clk_enable(clk_aclk_ddr_gpu);
+ clk_enable(clk_gpu);
} else {
- if(!IS_ERR(clk_gpu)) clk_disable(clk_gpu);
- if(!IS_ERR(clk_aclk_gpu)) clk_disable(clk_aclk_gpu);
- if(!IS_ERR(clk_hclk_gpu)) clk_disable(clk_hclk_gpu);
+ clk_disable(clk_gpu);
+ clk_disable(clk_aclk_gpu);
+ clk_disable(clk_aclk_ddr_gpu);
+ clk_disable(clk_hclk_gpu);
}
if(Power) {