/// scale of the target addressing mode for load / store of the given type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
- /// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
- /// and V works for isLegalAddressImmediate _and_ both can be applied
- /// simultaneously to the same instruction.
- virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
- const Type* Ty) const;
- /// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
- /// and GV works for isLegalAddressImmediate _and_ both can be applied
- /// simultaneously to the same instruction.
- virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
- const Type* Ty) const;
-
//===--------------------------------------------------------------------===//
// Div utility functions
//
return false;
}
-/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
-/// and V works for isLegalAddressImmediate _and_ both can be applied
-/// simultaneously to the same instruction.
-bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
- const Type* Ty) const {
- return false;
-}
-
-/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
-/// and GV works for isLegalAddressImmediate _and_ both can be applied
-/// simultaneously to the same instruction.
-bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
- const Type* Ty) const {
-
- return false;
-}
-
// Magic for divide replacement
struct ms {
}
}
-/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
-/// and V works for isLegalAddressImmediate _and_ both can be applied
-/// simultaneously to the same instruction.
-bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
- const Type* Ty) const {
- if (V == 0)
- return isLegalAddressScale(S, Ty);
- return false;
-}
-
-/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
-/// and GV works for isLegalAddressImmediate _and_ both can be applied
-/// simultaneously to the same instruction.
-bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
- const Type* Ty) const {
- return false;
-}
-
static bool getIndexedAddressParts(SDNode *Ptr, MVT::ValueType VT,
bool isSEXTLoad, SDOperand &Base,
SDOperand &Offset, bool &isInc,
/// type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
- /// isLegalAddressScaleAndImm - Return true if S works for
- /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_
- /// both can be applied simultaneously to the same instruction.
- virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
- const Type *Ty) const;
-
- /// isLegalAddressScaleAndImm - Return true if S works for
- /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
- /// both can be applied simultaneously to the same instruction.
- virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
- const Type *Ty) const;
-
/// getPreIndexedAddressParts - returns true by value, base pointer and
/// offset pointer and addressing mode by reference if the node's address
/// can be legally represented as pre-indexed load / store address.
}
}
-/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
-/// and V works for isLegalAddressImmediate _and_ both can be applied
-/// simultaneously to the same instruction.
-bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
- const Type* Ty) const {
- return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(V, Ty);
-}
-
-/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
-/// and GV works for isLegalAddressImmediate _and_ both can be applied
-/// simultaneously to the same instruction.
-bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
- const Type* Ty) const {
- return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(GV);
-}
-
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
/// type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
- /// isLegalAddressScaleAndImm - Return true if S works for
- /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_
- /// both can be applied simultaneously to the same instruction.
- virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
- const Type *Ty) const;
-
- /// isLegalAddressScaleAndImm - Return true if S works for
- /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
- /// both can be applied simultaneously to the same instruction.
- virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
- const Type *Ty) const;
-
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask