rk312x: vcodec driver revision for rk312x

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index d5ba10a1be648e1b4ef6aa2544ad99daa25385ab..3113221b7011dfaf53ae39ff77121ca7879672f3 100755 (executable)
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -658,15 +658,15 @@
                status = "disabled";
        };
 
-        vpu: vpu_service@10104000 {
+       vpu: vpu_service@10106000 {
                compatible = "vpu_service";
-               reg = <0x10104000 0x800>;
+               reg = <0x10106000 0x800>;
                interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "irq_enc", "irq_dec";
                clocks = <&clk_vdpu>, <&hclk_vdpu>;
                clock-names = "aclk_vcodec", "hclk_vcodec";
                name = "vpu_service";
-               status = "disabled";
+               status = "okay";
        };
 
        hevc: hevc_service@10104000 {
@@ -677,10 +677,10 @@
                clocks = <&clk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>;
                clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
                name = "hevc_service";
-               status = "disabled";
-        };
+               status = "okay";
+       };
 
-        iep: iep@10108000 {
+       iep: iep@10108000 {
                compatible = "rockchip,iep";
                reg = <0x10108000 0x800>;
                interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/arm/mach-rockchip/vcodec_service.c b/arch/arm/mach-rockchip/vcodec_service.c
index 45e13034fd24f7a5a97f0bf0edf46174c9c19d02..5ea3129b82f2dd3cfd9d74c8697d62feae26646e 100755 (executable)
--- a/arch/arm/mach-rockchip/vcodec_service.c
+++ b/arch/arm/mach-rockchip/vcodec_service.c
@@ -166,7 +166,7 @@ static VPU_HW_INFO_E vpu_hw_set[] = {
                .dec_reg_num    = REG_NUM_9190_DEC_PP,\r
                .dec_io_size    = REG_NUM_9190_DEC_PP * 4,\r
        },\r
-       \r
+\r
 };\r
 \r
 \r
@@ -358,7 +358,7 @@ typedef struct vpu_service_info {
        struct dentry           *debugfs_file_regs;\r
 \r
        u32 irq_status;\r
-#if defined(CONFIG_VCODEC_MMU) \r
+#if defined(CONFIG_VCODEC_MMU)\r
        struct ion_client       *ion_client;\r
        struct list_head        mem_region_list;\r
        struct device           *mmu_dev;\r
@@ -401,35 +401,41 @@ static const struct file_operations debug_vcodec_fops = {
 #define VPU_TIMEOUT_DELAY              2*HZ /* 2s */\r
 #define VPU_SIMULATE_DELAY             msecs_to_jiffies(15)\r
 \r
+#define BIT_VCODEC_SEL_RK3036          (1<<3)\r
+#define BIT_VCODEC_SEL_RK312X          (1<<15)\r
 static void vcodec_enter_mode_nolock(enum vcodec_device_id id, u32 *reserved_mode)\r
 {\r
-       if (soc_is_rk3036()) {\r
+       if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128()) {\r
+               int bits = soc_is_rk3036() ? BIT_VCODEC_SEL_RK3036 : BIT_VCODEC_SEL_RK312X;\r
+               void __iomem *addr = soc_is_rk3036() ? (RK_GRF_VIRT + RK3036_GRF_SOC_CON1) : (RK_GRF_VIRT + RK312X_GRF_SOC_CON1);\r
                if (reserved_mode)\r
-                       *reserved_mode = readl_relaxed(RK_GRF_VIRT + RK3036_GRF_SOC_CON1);\r
-#define BIT_VCODEC_SEL         (1<<3)\r
-               if (id == VCODEC_DEVICE_ID_HEVC) {\r
-                       writel_relaxed(readl_relaxed(RK_GRF_VIRT + RK3036_GRF_SOC_CON1) | (BIT_VCODEC_SEL) | (BIT_VCODEC_SEL << 16), RK_GRF_VIRT + RK3036_GRF_SOC_CON1);\r
-               } else {\r
-                       writel_relaxed((readl_relaxed(RK_GRF_VIRT + RK3036_GRF_SOC_CON1) & (~BIT_VCODEC_SEL)) | (BIT_VCODEC_SEL << 16), RK_GRF_VIRT + RK3036_GRF_SOC_CON1);\r
-               }\r
+                       *reserved_mode = readl_relaxed(addr);\r
+               if (id == VCODEC_DEVICE_ID_HEVC)\r
+                       writel_relaxed(readl_relaxed(addr) | (bits) | (bits << 16), addr);\r
+               else\r
+                       writel_relaxed((readl_relaxed(addr) & (~bits)) | (bits << 16), addr);\r
        }\r
 }\r
 \r
 static void vcodec_exit_mode_nolock(enum vcodec_device_id id, u32 reserved_mode)\r
 {\r
-       writel_relaxed(reserved_mode | (BIT_VCODEC_SEL << 16), RK_GRF_VIRT + RK3036_GRF_SOC_CON1);\r
+       if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128()) {\r
+               int bits = soc_is_rk3036() ? BIT_VCODEC_SEL_RK3036 : BIT_VCODEC_SEL_RK312X;\r
+               void __iomem *addr = soc_is_rk3036() ? (RK_GRF_VIRT + RK3036_GRF_SOC_CON1) : (RK_GRF_VIRT + RK312X_GRF_SOC_CON1);\r
+               writel_relaxed(reserved_mode | (bits << 16), addr);\r
+       }\r
 }\r
 \r
 static void vcodec_enter_mode(enum vcodec_device_id id)\r
 {\r
-       if (soc_is_rk3036())\r
+       if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128())\r
                mutex_lock(&g_mode_mutex);\r
        vcodec_enter_mode_nolock(id, NULL);\r
 }\r
 \r
 static void vcodec_exit_mode(void)\r
 {\r
-       if (soc_is_rk3036())\r
+       if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128())\r
                mutex_unlock(&g_mode_mutex);\r
 }\r
 \r
@@ -456,7 +462,7 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
                                break;\r
                        }\r
 \r
-                       if (!soc_is_rk3036()) {\r
+                       if (!soc_is_rk3036() && !soc_is_rk3126() && !soc_is_rk3128()) {\r
                                pservice->clk_cabac = devm_clk_get(pservice->dev, "clk_cabac");\r
                                if (IS_ERR(pservice->clk_cabac)) {\r
                                        dev_err(pservice->dev, "failed on clk_get clk_cabac\n");\r
@@ -466,7 +472,7 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
                                pservice->clk_cabac = NULL;\r
                        }\r
 \r
-                       if (!soc_is_rk3036()) {\r
+                       if (!soc_is_rk3036() && !soc_is_rk3126() && !soc_is_rk3128()) {\r
                                pservice->pd_video = devm_clk_get(pservice->dev, "pd_hevc");\r
                                if (IS_ERR(pservice->pd_video)) {\r
                                        dev_err(pservice->dev, "failed on clk_get pd_hevc\n");\r
@@ -476,7 +482,7 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
                                pservice->pd_video = NULL;\r
                        }\r
                } else {\r
-                       if (!soc_is_rk3036()) {\r
+                       if (!soc_is_rk3036() && !soc_is_rk3126() && !soc_is_rk3128()) {\r
                                pservice->pd_video = devm_clk_get(pservice->dev, "pd_video");\r
                                if (IS_ERR(pservice->pd_video)) {\r
                                        dev_err(pservice->dev, "failed on clk_get pd_video\n");\r
@@ -487,6 +493,14 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
                        }\r
                }\r
 \r
+               if (soc_is_rk3126() || soc_is_rk3128()) {\r
+                       pservice->pd_video = devm_clk_get(pservice->dev, "pd_video");\r
+                       if (IS_ERR(pservice->pd_video)) {\r
+                               dev_err(pservice->dev, "failed on clk_get pd_video\n");\r
+                               break;\r
+                       }\r
+               }\r
+\r
                return 0;\r
        } while (0);\r
 \r
@@ -880,7 +894,7 @@ static vpu_reg *reg_init(struct vpu_service_info *pservice, vpu_session *session
        INIT_LIST_HEAD(&reg->session_link);\r
        INIT_LIST_HEAD(&reg->status_link);\r
 \r
-#if defined(CONFIG_VCODEC_MMU)  \r
+#if defined(CONFIG_VCODEC_MMU)\r
        if (pservice->mmu_dev)\r
                INIT_LIST_HEAD(&reg->mem_region_list);\r
 #endif\r
@@ -1384,7 +1398,7 @@ static long vpu_service_ioctl(struct file *filp, unsigned int cmd, unsigned long
                int iommu_enable = 0;\r
 \r
 #if defined(CONFIG_VCODEC_MMU)\r
-               iommu_enable = pservice->mmu_dev ? 1 : 0; \r
+               iommu_enable = pservice->mmu_dev ? 1 : 0;\r
 #endif\r
 \r
                if (copy_to_user((void __user *)arg, &iommu_enable, sizeof(int))) {\r
@@ -1695,7 +1709,7 @@ static int vcodec_probe(struct platform_device *pdev)
        if (pservice->debugfs_dir == NULL)\r
                pr_err("create debugfs dir %s failed\n", dev_name(dev));\r
 \r
-       pservice->debugfs_file_regs = \r
+       pservice->debugfs_file_regs =\r
                debugfs_create_file("regs", 0664,\r
                                    pservice->debugfs_dir, pservice,\r
                                    &debug_vcodec_fops);\r
@@ -1816,7 +1830,7 @@ static void get_hw_info(struct vpu_service_info *pservice)
        if (pservice->dev_id == VCODEC_DEVICE_ID_VPU) {\r
                u32 configReg   = pservice->dec_dev.hwregs[VPU_DEC_HWCFG0];\r
                u32 asicID      = pservice->dec_dev.hwregs[0];\r
-       \r
+\r
                dec->h264Support    = (configReg >> DWL_H264_E) & 0x3U;\r
                dec->jpegSupport    = (configReg >> DWL_JPEG_E) & 0x01U;\r
                if (dec->jpegSupport && ((configReg >> DWL_PJPEG_E) & 0x01U))\r
@@ -1830,11 +1844,11 @@ static void get_hw_info(struct vpu_service_info *pservice)
 \r
                if (soc_is_rk3190() || soc_is_rk3288())\r
                        dec->maxDecPicWidth = 4096;\r
-               else if (soc_is_rk3036())\r
+               else if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128())\r
                        dec->maxDecPicWidth = 1920;\r
                else\r
                        dec->maxDecPicWidth = configReg & 0x07FFU;\r
-       \r
+\r
                /* 2nd Config register */\r
                configReg   = pservice->dec_dev.hwregs[VPU_DEC_HWCFG1];\r
                if (dec->refBufSupport) {\r
@@ -1862,9 +1876,9 @@ static void get_hw_info(struct vpu_service_info *pservice)
 \r
                if (dec->refBufSupport && (asicID >> 16) == 0x6731U )\r
                        dec->refBufSupport |= 8; /* enable HW support for offset */\r
-       \r
+\r
                /// invalidate fuse register value in rk319x vpu and following.\r
-               if (!soc_is_rk3190() && !soc_is_rk3288() && !soc_is_rk3036()) {\r
+               if (!soc_is_rk3190() && !soc_is_rk3288() && !soc_is_rk3036() && !soc_is_rk3126() && !soc_is_rk3128()) {\r
                        VPUHwFuseStatus_t hwFuseSts;\r
                        /* Decoder fuse configuration */\r
                        u32 fuseReg = pservice->dec_dev.hwregs[VPU_DEC_HW_FUSE_CFG];\r
@@ -2004,7 +2018,7 @@ static void get_hw_info(struct vpu_service_info *pservice)
 \r
                pservice->bug_dec_addr = cpu_is_rk30xx();\r
        } else {\r
-               if (soc_is_rk3036())\r
+               if (soc_is_rk3036()  || soc_is_rk3126() || soc_is_rk3128())\r
                        dec->maxDecPicWidth = 1920;\r
                else\r
                        dec->maxDecPicWidth = 4096;\r
@@ -2308,7 +2322,7 @@ u8* get_align_ptr_no_copy(int len, u32 *phy)
 static int hevc_test_case0(vpu_service_info *pservice)\r
 {\r
        vpu_session session;\r
-       vpu_reg *reg; \r
+       vpu_reg *reg;\r
        unsigned long size = 272;//sizeof(register_00); // registers array length\r
        int testidx = 0;\r
        int ret = 0;\r
@@ -2324,7 +2338,7 @@ static int hevc_test_case0(vpu_service_info *pservice)
        int rps_size[2];\r
        int scl_size[2];\r
        int cabac_size[2];\r
-       \r
+\r
        u32 phy_pps;\r
        u32 phy_rps;\r
        u32 phy_scl;\r
@@ -2371,7 +2385,7 @@ static int hevc_test_case0(vpu_service_info *pservice)
 \r
        scl_size[0] = sizeof(scaling_list_00);\r
        scl_size[1] = sizeof(scaling_list_01);\r
-       \r
+\r
        cabac_size[0] = sizeof(Cabac_table);\r
        cabac_size[1] = sizeof(Cabac_table);\r
 \r