net: mvpp2: Fix the periodic XON enable bit
authorMarcin Wojtas <mw@semihalf.com>
Mon, 21 Jul 2014 16:48:11 +0000 (13:48 -0300)
committerDavid S. Miller <davem@davemloft.net>
Wed, 23 Jul 2014 02:50:30 +0000 (19:50 -0700)
This bit was originally wrong, the correct value is BIT(1), so fix it.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/mvpp2.c

index 4f6e4a1400e7c4b8e132a2202f3adad903879bd5..ed32f97496d3155f4830a357e5be3d94776f220a 100644 (file)
 #define      MVPP2_GMAC_MAX_RX_SIZE_MASK       0x7ffc
 #define      MVPP2_GMAC_MIB_CNTR_EN_MASK       BIT(15)
 #define MVPP2_GMAC_CTRL_1_REG                  0x4
-#define      MVPP2_GMAC_PERIODIC_XON_EN_MASK   BIT(0)
+#define      MVPP2_GMAC_PERIODIC_XON_EN_MASK   BIT(1)
 #define      MVPP2_GMAC_GMII_LB_EN_MASK                BIT(5)
 #define      MVPP2_GMAC_PCS_LB_EN_BIT          6
 #define      MVPP2_GMAC_PCS_LB_EN_MASK         BIT(6)