I completely misunderstood what ARMISD::CMPZ means. It's not "compare equal to zero", it's "compare, only setting the zero/Z flag". It can either be equal-to-zero or not-equal-to-zero, and we weren't checking what sense it was.
If it's equal-to-zero, we can swap the operands around and pretend like it is not-equal-to-zero, which is both a bug fix and lets us handle more cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252891
91177308-0d34-0410-b5e6-
96231b3b80d8
SDValue Op0 = CMOV->getOperand(0);
SDValue Op1 = CMOV->getOperand(1);
+ auto CCNode = cast<ConstantSDNode>(CMOV->getOperand(2));
+ auto CC = CCNode->getAPIntValue().getLimitedValue();
SDValue CmpZ = CMOV->getOperand(4);
assert(CmpZ->getOpcode() == ARMISD::CMPZ);
return SDValue();
SDValue X = And->getOperand(0);
+ if (CC == ARMCC::EQ) {
+ // We're performing an "equal to zero" compare. Swap the operands so we
+ // canonicalize on a "not equal to zero" compare.
+ std::swap(Op0, Op1);
+ } else {
+ assert(CC == ARMCC::NE && "How can a CMPZ node not be EQ or NE?");
+ }
+
if (Op1->getOpcode() != ISD::OR)
return SDValue();
ret i32 %bsel
}
+
+define i32 @f12(i32 %x, i32 %y) {
+; CHECK-LABEL: f12:
+; CHECK: bfi r1, r0, #4, #1
+ %y2 = and i32 %y, 4294967040 ; 0xFFFFFF00
+ %and = and i32 %x, 4
+ %or = or i32 %y2, 16
+ %cmp = icmp eq i32 %and, 0
+ %sel = select i1 %cmp, i32 %y2, i32 %or
+ ret i32 %sel
+}