Enable both OTG1 PHY and OTG2 USB2 PHY for rk3399 board.
With this patch, we can support usb battery charger detect
and hold wake lock in OTG peripheral mode.
Change-Id: Icae1924d8a2427c297f28032588f178532acc560
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
&u2phy0 {
status = "okay";
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
u2phy0_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
&u2phy1 {
status = "okay";
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
u2phy1_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
&u2phy0 {
status = "okay";
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
u2phy0_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
&u2phy1 {
status = "okay";
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
u2phy1_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
&u2phy0 {
status = "okay";
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
u2phy0_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
&u2phy1 {
status = "okay";
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
u2phy1_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
status = "okay";
};
+&u2phy0 {
+ status = "okay";
+
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+};
+
&u2phy1 {
status = "okay";
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
u2phy1_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
&u2phy0 {
status = "okay";
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
u2phy0_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
&u2phy1 {
status = "okay";
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
u2phy1_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
reg = <0x0 0xfe800000 0x0 0x100000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
dr_mode = "otg";
+ phys = <&u2phy0_otg>;
+ phy-names = "usb2-phy";
snps,dis_enblslpm_quirk;
snps,phyif_utmi_16_bits;
snps,dis_u2_freeclk_exists_quirk;
reg = <0x0 0xfe900000 0x0 0x100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
dr_mode = "otg";
+ phys = <&u2phy1_otg>;
+ phy-names = "usb2-phy";
snps,dis_enblslpm_quirk;
snps,phyif_utmi_16_bits;
snps,dis_u2_freeclk_exists_quirk;