arm64: dts: rockchip: enable both of otg usb2 phys for rk3399
authorWu Liang feng <wulf@rock-chips.com>
Thu, 28 Jul 2016 11:29:01 +0000 (19:29 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 29 Jul 2016 03:33:31 +0000 (11:33 +0800)
Enable both OTG1 PHY and OTG2 USB2 PHY for rk3399 board.
With this patch, we can support usb battery charger detect
and hold wake lock in OTG peripheral mode.

Change-Id: Icae1924d8a2427c297f28032588f178532acc560
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3399-box-808-android.dts
arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi
arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index bca58e9e06f67bf6b08e472a9358f30e31041ee3..ec6e7ab93522fbc0eef861add939f200fd58aaa6 100644 (file)
 &u2phy0 {
        status = "okay";
 
+       u2phy0_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy0_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
 &u2phy1 {
        status = "okay";
 
+       u2phy1_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy1_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
index fb0c784dbb0708c61cf0308bac63a9cff47ad317..4bcda1415038ed040cd60b784850ca38df2b8465 100644 (file)
 &u2phy0 {
        status = "okay";
 
+       u2phy0_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy0_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
 &u2phy1 {
        status = "okay";
 
+       u2phy1_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy1_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
index c4533e8bf1f97948bca9ff13152d7a0820e227ce..c97260c216a5471878adec91d70eb099b7a218e4 100644 (file)
 &u2phy0 {
        status = "okay";
 
+       u2phy0_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy0_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
 &u2phy1 {
        status = "okay";
 
+       u2phy1_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy1_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
index eefd8fd5df084c7e972a1c903957ab482cb1af7e..3034c88400b7d4a45147d3ec813d02e33b19a6d4 100644 (file)
        status = "okay";
 };
 
+&u2phy0 {
+       status = "okay";
+
+       u2phy0_otg: otg-port {
+               status = "okay";
+       };
+};
+
 &u2phy1 {
        status = "okay";
 
+       u2phy1_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy1_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
index 52b69b73bab4d74e1f5218bd3d0eef96747ff2f0..936565e3e65ee53d5655f65de7ee7b3a3aa1cdce 100644 (file)
 &u2phy0 {
        status = "okay";
 
+       u2phy0_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy0_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
 &u2phy1 {
        status = "okay";
 
+       u2phy1_otg: otg-port {
+               status = "okay";
+       };
+
        u2phy1_host: host-port {
                phy-supply = <&vcc5v0_host>;
                status = "okay";
index ee2b83effbafb2746fe3203c8d8a82c4f5682b80..e8d3202782a0f223f34ba07a1d39627b76d1e409 100644 (file)
                        reg = <0x0 0xfe800000 0x0 0x100000>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
                        dr_mode = "otg";
+                       phys = <&u2phy0_otg>;
+                       phy-names = "usb2-phy";
                        snps,dis_enblslpm_quirk;
                        snps,phyif_utmi_16_bits;
                        snps,dis_u2_freeclk_exists_quirk;
                        reg = <0x0 0xfe900000 0x0 0x100000>;
                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
                        dr_mode = "otg";
+                       phys = <&u2phy1_otg>;
+                       phy-names = "usb2-phy";
                        snps,dis_enblslpm_quirk;
                        snps,phyif_utmi_16_bits;
                        snps,dis_u2_freeclk_exists_quirk;