drm/radeon/dpm: fill in some initial vce infrastructure

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 2b26feb0a7c623de7c7c67127fdf4fca0dea79bb..60c171c60a64d80396ee990d2e433dbf7162447f 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1259,6 +1259,15 @@ enum radeon_dpm_event_src {
        RADEON_DPM_EVENT_SRC_DIGIAL_OR_EXTERNAL = 4
 };
 
+enum radeon_vce_level {
+       RADEON_VCE_LEVEL_AC_ALL = 0,     /* AC, All cases */
+       RADEON_VCE_LEVEL_DC_EE = 1,      /* DC, entropy encoding */
+       RADEON_VCE_LEVEL_DC_LL_LOW = 2,  /* DC, low latency queue, res <= 720 */
+       RADEON_VCE_LEVEL_DC_LL_HIGH = 3, /* DC, low latency queue, 1080 >= res > 720 */
+       RADEON_VCE_LEVEL_DC_GP_LOW = 4,  /* DC, general purpose queue, res <= 720 */
+       RADEON_VCE_LEVEL_DC_GP_HIGH = 5, /* DC, general purpose queue, 1080 >= res > 720 */
+};
+
 struct radeon_ps {
        u32 caps; /* vbios flags */
        u32 class; /* vbios flags */
@@ -1269,6 +1278,8 @@ struct radeon_ps {
        /* VCE clocks */
        u32 evclk;
        u32 ecclk;
+       bool vce_active;
+       enum radeon_vce_level vce_level;
        /* asic priv */
        void *ps_priv;
 };
@@ -1480,6 +1491,7 @@ struct radeon_dpm {
        /* special states active */
        bool                    thermal_active;
        bool                    uvd_active;
+       bool                    vce_active;
        /* thermal handling */
        struct radeon_dpm_thermal thermal;
        /* forced levels */

diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 8e8153e471c20a6b0dba28b38ce36bcd78f41a7b..a4687e7b45f8747337a40f5994b3499f704a934f 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -826,6 +826,9 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
 
        /* no need to reprogram if nothing changed unless we are on BTC+ */
        if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) {
+               /* vce just modifies an existing state so force a change */
+               if (ps->vce_active != rdev->pm.dpm.vce_active)
+                       goto force;
                if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) {
                        /* for pre-BTC and APUs if the num crtcs changed but state is the same,
                         * all we need to do is update the display configuration.
@@ -862,16 +865,21 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
                }
        }
 
+force:
        if (radeon_dpm == 1) {
                printk("switching from power state:\n");
                radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps);
                printk("switching to power state:\n");
                radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps);
        }
+
        mutex_lock(&rdev->ddev->struct_mutex);
        down_write(&rdev->pm.mclk_lock);
        mutex_lock(&rdev->ring_lock);
 
+       /* update whether vce is active */
+       ps->vce_active = rdev->pm.dpm.vce_active;
+
        ret = radeon_dpm_pre_set_power_state(rdev);
        if (ret)
                goto done;