mmc: dw_mmc-rockchip: limit phase for WA

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index f0ed5643b2f56d43ecd1dc700f798d155e86c056..dff11ff8d8e67f644bb856b7c6bfa0a642532fcc 100755 (executable)
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -274,7 +274,7 @@ dw_mci_rockchip_execute_tuning(struct dw_mci_slot *slot, u32 opcode,
        }
 
        /* Try each phase and extract good ranges */
-       for (i = 0; i < NUM_PHASES - 6; i++) {
+       for (i = 0; i < NUM_PHASES - 8; i++) {
                rockchip_mmc_set_phase(TUNING_ITERATION_TO_PHASE(i), host);
                v = !dw_mci_tuning_test(slot, opcode, tuning_data, blk_test);