[ARM] tegra: stingray: CPCAP switcher voltage settings correction

CPCAP should not be automatically dropping SW2 and SW4 to 0.95v
when the primary standby line drops.  This must be controlled by
DVS as per nVidia.

Change-Id: I336dd3fc30ec0ff8672c88eeed81a6b0a8617b00
Signed-off-by: Greg Meiste <w30289@motorola.com>
Signed-off-by: Nick Pelly <npelly@google.com>

diff --git a/arch/arm/mach-tegra/board-stingray-power.c b/arch/arm/mach-tegra/board-stingray-power.c
index 4cbfacf453b5611ede721ea42b5cb22265296d0d..fb5c1c6b14c83192478f44338645e5932988ea9b 100644 (file)
--- a/arch/arm/mach-tegra/board-stingray-power.c
+++ b/arch/arm/mach-tegra/board-stingray-power.c
@@ -297,11 +297,11 @@ static struct platform_device *cpcap_devices[] = {
 struct cpcap_spi_init_data stingray_cpcap_spi_init[] = {
        {CPCAP_REG_S1C1,      0x0000},
        {CPCAP_REG_S1C2,      0x0000},
-       {CPCAP_REG_S2C1,      0x2830},
-       {CPCAP_REG_S2C2,      0x301C},
-       {CPCAP_REG_S3C,       0x0141},
-       {CPCAP_REG_S4C1,      0x2830},
-       {CPCAP_REG_S4C2,      0x301C},
+       {CPCAP_REG_S2C1,      0x4830},
+       {CPCAP_REG_S2C2,      0x3030},
+       {CPCAP_REG_S3C,       0x0541},
+       {CPCAP_REG_S4C1,      0x4830},
+       {CPCAP_REG_S4C2,      0x3030},
        {CPCAP_REG_S6C,       0x0000},
        {CPCAP_REG_VRF1C,     0x0000},
        {CPCAP_REG_VRF2C,     0x0000},