[Hexagon] Add NewValueJump support for C4_cmpneq, C4_cmplte, C4_cmplteu

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255027 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Hexagon/HexagonNewValueJump.cpp b/lib/Target/Hexagon/HexagonNewValueJump.cpp
index 6415c6cc7906958f767fffae1bb22df6dc44167b..20c4ab112b5f6beeef4ba96caf55d692cb0e7053 100644 (file)
--- a/lib/Target/Hexagon/HexagonNewValueJump.cpp
+++ b/lib/Target/Hexagon/HexagonNewValueJump.cpp
@@ -342,6 +342,24 @@ static unsigned getNewValueJumpOpcode(MachineInstr *MI, int reg,
       return taken ? Hexagon::J4_cmpgtui_t_jumpnv_t
                    : Hexagon::J4_cmpgtui_t_jumpnv_nt;
 
+    case Hexagon::C4_cmpneq:
+      return taken ? Hexagon::J4_cmpeq_f_jumpnv_t
+                   : Hexagon::J4_cmpeq_f_jumpnv_nt;
+
+    case Hexagon::C4_cmplte:
+      if (secondRegNewified)
+        return taken ? Hexagon::J4_cmplt_f_jumpnv_t
+                     : Hexagon::J4_cmplt_f_jumpnv_nt;
+      return taken ? Hexagon::J4_cmpgt_f_jumpnv_t
+                   : Hexagon::J4_cmpgt_f_jumpnv_nt;
+
+    case Hexagon::C4_cmplteu:
+      if (secondRegNewified)
+        return taken ? Hexagon::J4_cmpltu_f_jumpnv_t
+                     : Hexagon::J4_cmpltu_f_jumpnv_nt;
+      return taken ? Hexagon::J4_cmpgtu_f_jumpnv_t
+                   : Hexagon::J4_cmpgtu_f_jumpnv_nt;
+
     default:
        llvm_unreachable("Could not find matching New Value Jump instruction.");
   }

diff --git a/test/CodeGen/Hexagon/NVJumpCmp.ll b/test/CodeGen/Hexagon/NVJumpCmp.ll
new file mode 100644 (file)
index 0000000..6b160d9
--- /dev/null
+++ b/test/CodeGen/Hexagon/NVJumpCmp.ll
@@ -0,0 +1,89 @@
+; RUN: llc -march=hexagon -O2 -mcpu=hexagonv60  < %s | FileCheck %s
+
+; Look for an instruction, we really just do not want to see an abort.
+; CHECK: trace_event
+; REQUIRES: asserts
+
+target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a:0-n16:32"
+target triple = "hexagon-unknown--elf"
+
+; Function Attrs: nounwind
+define void @_ZN6Halide7Runtime8Internal13default_traceEPvPK18halide_trace_event() #0 {
+entry:
+  br i1 undef, label %if.then, label %if.else
+
+if.then:                                          ; preds = %entry
+  br label %while.cond
+
+while.cond:                                       ; preds = %while.cond, %if.then
+  br i1 undef, label %while.cond, label %while.end
+
+while.end:                                        ; preds = %while.cond
+  %add = add i32 undef, 48
+  br i1 undef, label %if.end, label %if.then17
+
+if.then17:                                        ; preds = %while.end
+  unreachable
+
+if.end:                                           ; preds = %while.end
+  %arrayidx21 = getelementptr inbounds [4096 x i8], [4096 x i8]* undef, i32 0, i32 8
+  store i8 undef, i8* %arrayidx21, align 4, !tbaa !1
+  br i1 undef, label %for.body42.preheader6, label %min.iters.checked
+
+for.body42.preheader6:                            ; preds = %vector.body.preheader, %min.iters.checked, %if.end
+  unreachable
+
+min.iters.checked:                                ; preds = %if.end
+  br i1 undef, label %for.body42.preheader6, label %vector.body.preheader
+
+vector.body.preheader:                            ; preds = %min.iters.checked
+  br i1 undef, label %for.cond48.preheader, label %for.body42.preheader6
+
+for.cond48.preheader:                             ; preds = %vector.body.preheader
+  br i1 undef, label %while.cond.i, label %for.body61.lr.ph
+
+for.body61.lr.ph:                                 ; preds = %for.cond48.preheader
+  br i1 undef, label %for.body61, label %min.iters.checked595
+
+min.iters.checked595:                             ; preds = %for.body61.lr.ph
+  br i1 undef, label %for.body61, label %vector.memcheck608
+
+vector.memcheck608:                               ; preds = %min.iters.checked595
+  %scevgep600 = getelementptr [4096 x i8], [4096 x i8]* undef, i32 0, i32 %add
+  %bound0604 = icmp ule i8* %scevgep600, undef
+  %memcheck.conflict607 = and i1 undef, %bound0604
+  br i1 %memcheck.conflict607, label %for.body61, label %vector.body590
+
+vector.body590:                                   ; preds = %vector.body590, %vector.memcheck608
+  br i1 undef, label %middle.block591, label %vector.body590, !llvm.loop !4
+
+middle.block591:                                  ; preds = %vector.body590
+  %cmp.n613 = icmp eq i32 undef, 0
+  br i1 %cmp.n613, label %while.cond.i, label %for.body61
+
+while.cond.i:                                     ; preds = %for.body61, %while.cond.i, %middle.block591, %for.cond48.preheader
+  br i1 undef, label %_ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit, label %while.cond.i
+
+_ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit: ; preds = %while.cond.i
+  unreachable
+
+for.body61:                                       ; preds = %for.body61, %middle.block591, %vector.memcheck608, %min.iters.checked595, %for.body61.lr.ph
+  %cmp59 = icmp ult i32 undef, undef
+  br i1 %cmp59, label %for.body61, label %while.cond.i, !llvm.loop !7
+
+if.else:                                          ; preds = %entry
+  unreachable
+}
+
+attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 2, !"halide_mattrs", !"+hvx"}
+!1 = !{!2, !2, i64 0}
+!2 = !{!"omnipotent char", !3, i64 0}
+!3 = !{!"Simple C/C++ TBAA"}
+!4 = distinct !{!4, !5, !6}
+!5 = !{!"llvm.loop.vectorize.width", i32 1}
+!6 = !{!"llvm.loop.interleave.count", i32 1}
+!7 = distinct !{!7, !5, !6}