phy/marvell: fix 88e1121 support

commit be8c648051048bc66fbca590d00f3e8543ec32af upstream.

Commit c477d0447db08068a497e7beb892b2b2a7bff64b added support for RGMII
rx/tx delays except that it ends up clearing rx/tx delays bit for modes
differents that RGMII*ID. Due to this, ethernet is not working anymore
on my guruplug server +. This patch is fixing that.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 0101f2bdf400e7b28eca39d0c9b7a413e2f0d326..c1ba49b772fff2e95866c169db2494b81bd49ab8 100644 (file)
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -196,20 +196,27 @@ static int m88e1121_config_aneg(struct phy_device *phydev)
                        MII_88E1121_PHY_MSCR_PAGE);
        if (err < 0)
                return err;
-       mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
-               MII_88E1121_PHY_MSCR_DELAY_MASK;
 
-       if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
-               mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
-                        MII_88E1121_PHY_MSCR_TX_DELAY);
-       else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
-               mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
-       else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
-               mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
+       if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
+           (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
+           (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
+           (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
 
-       err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
-       if (err < 0)
-               return err;
+               mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
+                       MII_88E1121_PHY_MSCR_DELAY_MASK;
+
+               if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
+                       mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
+                                MII_88E1121_PHY_MSCR_TX_DELAY);
+               else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
+                       mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
+               else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
+                       mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
+
+               err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
+               if (err < 0)
+                       return err;
+       }
 
        phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage);