Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is alway...
authorOwen Anderson <resistor@mac.com>
Tue, 13 Sep 2011 17:59:19 +0000 (17:59 +0000)
committerOwen Anderson <resistor@mac.com>
Tue, 13 Sep 2011 17:59:19 +0000 (17:59 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139610 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/AsmParser/ARMAsmParser.cpp
test/MC/ARM/basic-thumb2-instructions.s

index df5e0c9cdee994469ab583f72349873e74f6acb3..08a42f12483b7715d06a71812df592302456f54c 100644 (file)
@@ -3532,7 +3532,10 @@ validateInstruction(MCInst &Inst,
   MCInstrDesc &MCID = getInstDesc(Inst.getOpcode());
   SMLoc Loc = Operands[0]->getStartLoc();
   // Check the IT block state first.
-  if (inITBlock()) {
+  // NOTE: In Thumb mode, the BKPT instruction has the interesting property of
+  // being allowed in IT blocks, but not being predicable.  It just always
+  // executes.
+  if (inITBlock() && Inst.getOpcode() != ARM::tBKPT) {
     unsigned bit = 1;
     if (ITState.FirstCond)
       ITState.FirstCond = false;
index 8293d4c01c81fa2dc283b43ef91fe57079626276..5da74024bbdb7b817ef733579309b1c5f8e127c3 100644 (file)
@@ -259,6 +259,14 @@ _func:
 @ CHECK: bic.w r8, r8, r5, asr #15     @ encoding: [0x28,0xea,0xe5,0x38]
 @ CHECK: bic.w r12, r12, r6, ror #29   @ encoding: [0x2c,0xea,0x76,0x7c]
 
+@------------------------------------------------------------------------------
+@ BKPT
+@------------------------------------------------------------------------------
+        it pl
+        bkpt #234
+
+@ CHECK: it pl                      @ encoding: [0x58,0xbf]
+@ CHECK: bkpt #234                    @ encoding: [0xea,0xbe]
 
 @------------------------------------------------------------------------------
 @ BXJ