ASoC: rt5640: add mono adc event function
authorSugar Zhang <sugar.zhang@rock-chips.com>
Fri, 19 Feb 2016 08:11:04 +0000 (16:11 +0800)
committerSugar Zhang <sugar.zhang@rock-chips.com>
Fri, 19 Feb 2016 08:36:08 +0000 (16:36 +0800)
Change-Id: I9d992ce28ad8cc7f772cb83ebde6b9c57b412acd
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
sound/soc/codecs/rt5640.c
sound/soc/codecs/rt5640.h

index 09288233d3c4f3074ab2abc7c7d392ceb8430fe8..6626e2cfbcb770f5e7ae3f3c66e28658fb50c76a 100644 (file)
@@ -1056,6 +1056,52 @@ static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
        return 0;
 }
 
+static int rt5640_mono_adcl_event(struct snd_soc_dapm_widget *w,
+                                 struct snd_kcontrol *kcontrol, int event)
+{
+       struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
+
+       switch (event) {
+       case SND_SOC_DAPM_POST_PMU:
+               snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
+                                   RT5640_M_MAMIX_L, 0);
+               break;
+       case SND_SOC_DAPM_PRE_PMD:
+               snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
+                                   RT5640_M_MAMIX_L,
+                                   RT5640_M_MAMIX_L);
+               break;
+
+       default:
+               return 0;
+       }
+
+       return 0;
+}
+
+static int rt5640_mono_adcr_event(struct snd_soc_dapm_widget *w,
+                                 struct snd_kcontrol *kcontrol, int event)
+{
+       struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
+
+       switch (event) {
+       case SND_SOC_DAPM_POST_PMU:
+               snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
+                                   RT5640_M_MAMIX_R, 0);
+               break;
+       case SND_SOC_DAPM_PRE_PMD:
+               snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
+                                   RT5640_M_MAMIX_R,
+                                   RT5640_M_MAMIX_R);
+               break;
+
+       default:
+               return 0;
+       }
+
+       return 0;
+}
+
 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
        SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
                        RT5640_PWR_PLL_BIT, 0, NULL, 0),
@@ -1133,12 +1179,18 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
                rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
        SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
                RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
-       SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
-               rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
+       SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
+                            rt5640_mono_adc_l_mix,
+                            ARRAY_SIZE(rt5640_mono_adc_l_mix),
+                            rt5640_mono_adcl_event,
+                            SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
        SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
                RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
-       SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
-               rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
+       SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
+                            rt5640_mono_adc_r_mix,
+                            ARRAY_SIZE(rt5640_mono_adc_r_mix),
+                            rt5640_mono_adcr_event,
+                            SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 
        /* Digital Interface */
        SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
index 084507d15c580d27213308d2d687bc3e3a1f72a3..170c4dc33f92fab7a229e1e2c29969eec7ce89f3 100644 (file)
 #define RT5640_EQ_GN_HIP2                      0xb2
 #define RT5640_EQ_PRE_VOL                      0xb3
 #define RT5640_EQ_PST_VOL                      0xb4
+/* General Control */
+#define RT5640_GEN_CTRL1                       0xfa
 
 /* global definition */
 #define RT5640_L_MUTE                          (0x1 << 15)
@@ -2036,6 +2038,10 @@ enum {
 #define RT5640_HEADSET_DET     BIT(1)
 #define RT5640_HEADPHO_DET     BIT(2)
 
+/* General Control1 (0xfa) */
+#define RT5640_M_MAMIX_L                       (0x1 << 13)
+#define RT5640_M_MAMIX_R                       (0x1 << 12)
+
 /* System Clock Source */
 #define RT5640_SCLK_S_MCLK     0
 #define RT5640_SCLK_S_PLL1     1