lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take

care of this ourselves

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21110 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/IA64/IA64.td b/lib/Target/IA64/IA64.td
index 36ed340aa739996766f9fefeaf83c02062872ba8..1370e37b329b4127d3b1db013dad81ef8a50732a 100644 (file)
--- a/lib/Target/IA64/IA64.td
+++ b/lib/Target/IA64/IA64.td
@@ -42,8 +42,8 @@ def IA64 : Target {
   
   //'special' GRs:
 
-  r1, // global data pointer (GP)
-  r12, // memory stack pointer (SP)
+//  r1, // global data pointer (GP)  - XXX NOT callee saved, we do it ourselves
+//  r12, // memory stack pointer (SP)- XXX NOT callee saved, we do it ourselves
   // **** r13 (thread pointer) we do not touch, ever. it's not here. ****//
   //r15, // our frame pointer (FP)