V4L/DVB: mx1-camera: compile fix
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Sat, 27 Mar 2010 21:42:13 +0000 (18:42 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Thu, 6 May 2010 22:20:51 +0000 (19:20 -0300)
This fixes a regression of

7d58289 (mx1: prefix SOC specific defines with MX1_ and deprecate old names)

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
drivers/media/video/mx1_camera.c

index 07be8ad7ec37b90a322e59e7e6d7af34f04d0b42..7c4870bd5a2144e39697501ce4b85e42e1e36459 100644 (file)
 #define DMA_MODE_WRITE         1
 #define DMA_MODE_MASK          1
 
-#define DMA_BASE IO_ADDRESS(DMA_BASE_ADDR)
+#define MX1_DMA_REG(offset)    MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR + (offset))
+
+/* DMA Interrupt Mask Register */
+#define MX1_DMA_DIMR           MX1_DMA_REG(0x08)
+
+/* Channel Control Register */
+#define MX1_DMA_CCR(x)         MX1_DMA_REG(0x8c + ((x) << 6))
 
 #define IMX_DMA_MEMSIZE_32     (0 << 4)
 #define IMX_DMA_MEMSIZE_8      (1 << 4)
index 3c8ebfcb742ecbe7704e92e0df2dbd8d453226d1..34a66019190ef0feef198cddc7c3a471d1db208f 100644 (file)
@@ -49,8 +49,6 @@
 /*
  * CSI registers
  */
-#define DMA_CCR(x)     (0x8c + ((x) << 6))     /* Control Registers */
-#define DMA_DIMR       0x08                    /* Interrupt mask Register */
 #define CSICR1         0x00                    /* CSI Control Register 1 */
 #define CSISR          0x08                    /* CSI Status Register */
 #define CSIRXR         0x10                    /* CSI RxFIFO Register */
@@ -784,7 +782,7 @@ static int __init mx1_camera_probe(struct platform_device *pdev)
                               pcdev);
 
        imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
-                              IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
+                              IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
        /* burst length : 16 words = 64 bytes */
        imx_dma_config_burstlen(pcdev->dma_chan, 0);
 
@@ -798,8 +796,8 @@ static int __init mx1_camera_probe(struct platform_device *pdev)
        set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
                                                   &mx1_camera_sof_fiq_start);
 
-       regs.ARM_r8 = DMA_BASE + DMA_DIMR;
-       regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
+       regs.ARM_r8 = (long)MX1_DMA_DIMR;
+       regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
        regs.ARM_r10 = (long)pcdev->base + CSICR1;
        regs.ARM_fp = (long)pcdev->base + CSISR;
        regs.ARM_sp = 1 << pcdev->dma_chan;