arm64: dts: rockchip: add tsadc's working clock rate for rk3288

add tsadc's working clock rate for rk3288. if not set, tsadc
will work at the default rate of 1k hz.

Change-Id: I1b26351c3fb97f5ceb4657c2356c2f5649ad140c
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 1947ef8f9cebdeac9ca8c71d566175dc2979e327..f7601f4f7bedd88d4a763e751c6366b719ccf435 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -610,6 +610,8 @@
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
                clock-names = "tsadc", "apb_pclk";
+               assigned-clocks = <&cru SCLK_TSADC>;
+               assigned-clock-rates = <10000>;
                resets = <&cru SRST_TSADC>;
                reset-names = "tsadc-apb";
                pinctrl-names = "init", "default", "sleep";