* Inquire about the number of operands from the instruction directly

* Only check for a register if we are sure the instruction has one allocated

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14509 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPC32AsmPrinter.cpp b/lib/Target/PowerPC/PPC32AsmPrinter.cpp
index 0d519eeab06e10a99baf9e70797079bd547f47eb..b06eb4bcc5915f60c4165dcd1afb7d6ac96be459 100644 (file)
--- a/lib/Target/PowerPC/PPC32AsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPC32AsmPrinter.cpp
@@ -498,7 +498,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
   const TargetInstrDescriptor &Desc = TII.get(Opcode);
   unsigned int i;
 
-  unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
+  unsigned int ArgCount = MI->getNumOperands();
+    //Desc.TSFlags & PPC32II::ArgCountMask;
   unsigned int ArgType[] = {
     (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
     (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
@@ -554,7 +555,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
     O << ", ";
     printOp(MI->getOperand(1));
     O << "(";
-    if (MI->getOperand(2).getReg() == PPC32::R0)
+    if (MI->getOperand(2).hasAllocatedReg() &&
+        MI->getOperand(2).getReg() == PPC32::R0)
       O << "0";
     else
       printOp(MI->getOperand(2));

diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 0d519eeab06e10a99baf9e70797079bd547f47eb..b06eb4bcc5915f60c4165dcd1afb7d6ac96be459 100644 (file)
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -498,7 +498,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
   const TargetInstrDescriptor &Desc = TII.get(Opcode);
   unsigned int i;
 
-  unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
+  unsigned int ArgCount = MI->getNumOperands();
+    //Desc.TSFlags & PPC32II::ArgCountMask;
   unsigned int ArgType[] = {
     (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
     (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
@@ -554,7 +555,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
     O << ", ";
     printOp(MI->getOperand(1));
     O << "(";
-    if (MI->getOperand(2).getReg() == PPC32::R0)
+    if (MI->getOperand(2).hasAllocatedReg() &&
+        MI->getOperand(2).getReg() == PPC32::R0)
       O << "0";
     else
       printOp(MI->getOperand(2));

diff --git a/lib/Target/PowerPC/PowerPCAsmPrinter.cpp b/lib/Target/PowerPC/PowerPCAsmPrinter.cpp
index 0d519eeab06e10a99baf9e70797079bd547f47eb..b06eb4bcc5915f60c4165dcd1afb7d6ac96be459 100644 (file)
--- a/lib/Target/PowerPC/PowerPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PowerPCAsmPrinter.cpp
@@ -498,7 +498,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
   const TargetInstrDescriptor &Desc = TII.get(Opcode);
   unsigned int i;
 
-  unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
+  unsigned int ArgCount = MI->getNumOperands();
+    //Desc.TSFlags & PPC32II::ArgCountMask;
   unsigned int ArgType[] = {
     (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
     (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
@@ -554,7 +555,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
     O << ", ";
     printOp(MI->getOperand(1));
     O << "(";
-    if (MI->getOperand(2).getReg() == PPC32::R0)
+    if (MI->getOperand(2).hasAllocatedReg() &&
+        MI->getOperand(2).getReg() == PPC32::R0)
       O << "0";
     else
       printOp(MI->getOperand(2));