rk3066b/rk3168: fix CORE_CLK_DIV define error
authorchenxing <chenxing@rock-chips.com>
Sat, 18 May 2013 05:17:24 +0000 (13:17 +0800)
committerchenxing <chenxing@rock-chips.com>
Sat, 18 May 2013 05:17:24 +0000 (13:17 +0800)
arch/arm/mach-rk30/include/mach/cru-rk3066b.h

index f9da1ab20434b791b57994efd7905434fceb7d3b..a0451ba782959b4c1f7f8291a55c0d987fba6feb 100755 (executable)
@@ -110,7 +110,7 @@ enum rk_plls_id {
 
 #define CORE_CLK_DIV_W_MSK     (0x1F << 25)
 #define CORE_CLK_DIV_MSK       (0x1F << 9)
-#define CORE_CLK_DIV(i)                (((i) - 1) & 0x1F)
+#define CORE_CLK_DIV(i)                ((((i) - 1) & 0x1F) << 9)
 
 #define CPU_SEL_PLL_MSK                (1 << 5)
 #define CPU_SEL_PLL_W_MSK      (1 << 21)