MIR Printer: extract the code that prints MBB references into a new method. NFC.

This commit enables the MIR printer to reuse the code that prints MBB
references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241087 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp
index de747783468749ba719a7393fd27e64cc3fd359d..18c976bcd3e79988e944d6bfd7837c2f993ef37c 100644 (file)
--- a/lib/CodeGen/MIRPrinter.cpp
+++ b/lib/CodeGen/MIRPrinter.cpp
@@ -61,6 +61,7 @@ public:
       : M(M), OS(OS), RegisterMaskIds(RegisterMaskIds) {}
 
   void print(const MachineInstr &MI);
+  void printMBBReference(const MachineBasicBlock &MBB);
   void print(const MachineOperand &Op, const TargetRegisterInfo *TRI);
 };
 
@@ -193,6 +194,14 @@ static void printReg(unsigned Reg, raw_ostream &OS,
     llvm_unreachable("Can't print this kind of register yet");
 }
 
+void MIPrinter::printMBBReference(const MachineBasicBlock &MBB) {
+  OS << "%bb." << MBB.getNumber();
+  if (const auto *BB = MBB.getBasicBlock()) {
+    if (BB->hasName())
+      OS << '.' << BB->getName();
+  }
+}
+
 void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
   switch (Op.getType()) {
   case MachineOperand::MO_Register:
@@ -204,11 +213,7 @@ void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
     OS << Op.getImm();
     break;
   case MachineOperand::MO_MachineBasicBlock:
-    OS << "%bb." << Op.getMBB()->getNumber();
-    if (const auto *BB = Op.getMBB()->getBasicBlock()) {
-      if (BB->hasName())
-        OS << '.' << BB->getName();
-    }
+    printMBBReference(*Op.getMBB());
     break;
   case MachineOperand::MO_GlobalAddress:
     // FIXME: Make this faster - print as operand will create a slot tracker to