#define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */
#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */
+#define MCFDMA_BASE0 (MCF_MBAR + 0x200) /* Base address DMA 0 */
+#define MCFDMA_BASE1 (MCF_MBAR + 0x240) /* Base address DMA 1 */
+
#if defined(CONFIG_NETtel)
#define MCFUART_BASE1 0x180 /* Base address of UART1 */
#define MCFUART_BASE2 0x140 /* Base address of UART2 */
*/
#define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A)
#define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C)
+
+/*
+ * DMA unit base addresses.
+ */
+#define MCFDMA_BASE0 (MCF_IPSBAR + 0x100)
+#define MCFDMA_BASE1 (MCF_IPSBAR + 0x140)
+#define MCFDMA_BASE2 (MCF_IPSBAR + 0x180)
+#define MCFDMA_BASE3 (MCF_IPSBAR + 0x1C0)
+
/****************************************************************************/
#endif /* m523xsim_h */
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
#define MCFUART_BASE2 0x200 /* Base address of UART2 */
+/*
+ * DMA unit base addresses.
+ */
+#define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */
+#define MCFDMA_BASE1 (MCF_MBAR + 0x340) /* Base address DMA 1 */
+#define MCFDMA_BASE2 (MCF_MBAR + 0x380) /* Base address DMA 2 */
+#define MCFDMA_BASE3 (MCF_MBAR + 0x3C0) /* Base address DMA 3 */
+
/*
* Some symbol defines for the above...
*/
#define MCFSIM_PCDAT (MCF_MBAR + 0x96) /* Port C Data (r/w) */
#define MCFSIM_PDCNT (MCF_MBAR + 0x98) /* Port D Control (r/w) */
+#define MCFDMA_BASE0 (MCF_MBAR + 0xe0) /* Base address DMA 0 */
+
/*
* Define system peripheral IRQ usage.
*/
#define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */
#endif
+/*
+ * DMA unit base addresses.
+ */
+#define MCFDMA_BASE0 (MCF_IPSBAR + 0x100)
+#define MCFDMA_BASE1 (MCF_IPSBAR + 0x140)
+#define MCFDMA_BASE2 (MCF_IPSBAR + 0x180)
+#define MCFDMA_BASE3 (MCF_IPSBAR + 0x1C0)
+
/*
* UART module.
*/
#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */
#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */
+/*
+ * DMA unit base addresses.
+ */
+#define MCFDMA_BASE0 (MCF_IPSBAR + 0x00000100)
+#define MCFDMA_BASE1 (MCF_IPSBAR + 0x00000140)
+#define MCFDMA_BASE2 (MCF_IPSBAR + 0x00000180)
+#define MCFDMA_BASE3 (MCF_IPSBAR + 0x000001C0)
+
/*
* UART module.
*/
#define MCFSIM_PADDR (MCF_MBAR + 0x244)
#define MCFSIM_PADAT (MCF_MBAR + 0x248)
+/*
+ * DMA unit base addresses.
+ */
+#define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */
+#define MCFDMA_BASE1 (MCF_MBAR + 0x340) /* Base address DMA 1 */
+#define MCFDMA_BASE2 (MCF_MBAR + 0x380) /* Base address DMA 2 */
+#define MCFDMA_BASE3 (MCF_MBAR + 0x3C0) /* Base address DMA 3 */
+
/*
* UART module.
*/
#define MCFSIM_PADDR (MCF_MBAR + 0x244)
#define MCFSIM_PADAT (MCF_MBAR + 0x248)
+/*
+ * DMA unit base addresses.
+ */
+#define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */
+#define MCFDMA_BASE1 (MCF_MBAR + 0x340) /* Base address DMA 1 */
+#define MCFDMA_BASE2 (MCF_MBAR + 0x380) /* Base address DMA 2 */
+#define MCFDMA_BASE3 (MCF_MBAR + 0x3C0) /* Base address DMA 3 */
+
/*
* Generic GPIO support
*/
#define mcfdma_h
/****************************************************************************/
-
-/*
- * Get address specific defines for this Coldfire member.
- */
-#if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
-#define MCFDMA_BASE0 0x200 /* Base address of DMA 0 */
-#define MCFDMA_BASE1 0x240 /* Base address of DMA 1 */
-#elif defined(CONFIG_M5272)
-#define MCFDMA_BASE0 0x0e0 /* Base address of DMA 0 */
-#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
-/* These are relative to the IPSBAR, not MBAR */
-#define MCFDMA_BASE0 0x100 /* Base address of DMA 0 */
-#define MCFDMA_BASE1 0x140 /* Base address of DMA 1 */
-#define MCFDMA_BASE2 0x180 /* Base address of DMA 2 */
-#define MCFDMA_BASE3 0x1C0 /* Base address of DMA 3 */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#define MCFDMA_BASE0 0x300 /* Base address of DMA 0 */
-#define MCFDMA_BASE1 0x340 /* Base address of DMA 1 */
-#define MCFDMA_BASE2 0x380 /* Base address of DMA 2 */
-#define MCFDMA_BASE3 0x3C0 /* Base address of DMA 3 */
-#endif
-
-
#if !defined(CONFIG_M5272)
/*
*/
unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
#ifdef MCFDMA_BASE0
- MCF_MBAR + MCFDMA_BASE0,
+ MCFDMA_BASE0,
#endif
#ifdef MCFDMA_BASE1
- MCF_MBAR + MCFDMA_BASE1,
+ MCFDMA_BASE1,
#endif
#ifdef MCFDMA_BASE2
- MCF_MBAR + MCFDMA_BASE2,
+ MCFDMA_BASE2,
#endif
#ifdef MCFDMA_BASE3
- MCF_MBAR + MCFDMA_BASE3,
+ MCFDMA_BASE3,
#endif
};