arm64: dts: rk3368: add rockchip-suspend node
authorXiaoDong Huang <derrick.huang@rock-chips.com>
Fri, 5 May 2017 01:14:58 +0000 (09:14 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 5 May 2017 06:37:22 +0000 (14:37 +0800)
Change-Id: I68f8068c795e87ffa3cbea4b23ba5df56a70218d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3368.dtsi
include/dt-bindings/suspend/rockchip-rk3368.h

index 99803adb4ec6da293c5c4fea6055dddbefaf3f6f..c4ca7a6c703aab8629ba21f1f899c7c9dba93a5b 100644 (file)
@@ -47,6 +47,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/power/rk3368-power.h>
 #include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/suspend/rockchip-rk3368.h>
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/display/mipi_dsi.h>
 #include <dt-bindings/display/drm_mipi_dsi.h>
                        };
                };
        };
+
+       rockchip_suspend: rockchip-suspend {
+               compatible = "rockchip,pm-rk3368";
+               status = "disabled";
+               rockchip,sleep-debug-en = <0>;
+               rockchip,sleep-mode-config = <
+                       (0
+                       | RKPM_SLP_ARMOFF_LOGPD
+                       | RKPM_SLP_PMU_PLLS_PWRDN
+                       | RKPM_SLP_PMU_PMUALIVE_32K
+                       | RKPM_SLP_SFT_PLLS_DEEP
+                       | RKPM_SLP_PMU_DIS_OSC
+                       | RKPM_SLP_SFT_PD_NBSCUS
+                       )
+               >;
+       };
 };
index 372ca26fec0dbfda370363718cacb234177d227d..e8d4f5e7c7021224f4760712902636c02f6901e1 100644 (file)
 #define __DT_BINDINGS_ROCKCHIP_PM_H__
 /******************************bits ops************************************/
 
-#define RKPM_SLP_WFI                                   BIT(0)
-#define RKPM_SLP_ARMPD                         BIT(1)
-#define RKPM_SLP_ARMOFF                                BIT(2)
+#ifndef BIT
+#define BIT(nr)                                (1 << (nr))
+#endif
+
+#define RKPM_SLP_WFI                   BIT(0)
+#define RKPM_SLP_ARMPD                 BIT(1)
+#define RKPM_SLP_ARMOFF                        BIT(2)
 #define RKPM_SLP_ARMOFF_LOGPD          BIT(3)
 #define RKPM_SLP_ARMOFF_LOGOFF         BIT(4)
 #define RKPM_RUNNING_ARMMODE           BIT(5)
 
 /* func ctrl by pmu auto ctr */
-#define RKPM_SLP_PMU_PLLS_PWRDN        BIT(8) /* all plls except ddr's pll*/
+#define RKPM_SLP_PMU_PLLS_PWRDN                BIT(8) /* all plls except ddr's pll*/
 #define RKPM_SLP_PMU_PMUALIVE_32K      BIT(9)
 #define RKPM_SLP_PMU_DIS_OSC           BIT(10)