drm/i915: Fix the computation of required fb size for pipe

The computation of required framebuffer size in

commit d978ef14456a38034f6c0e94a794129501f89200
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Fri Mar 7 08:57:51 2014 -0800

    drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon v12

is too optimistic, and would rely on the invariant fb being
reconstructed to exactly fit each pipe (and probably ignore hardware
limits). Instead, we want to compute the upper bound on what the display
engine will access and ensure that is within the inherited framebuffer.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index d6d78c86c232b006906d5e7f4dbc9aabc943afb6..86b012ca7217731f602f24a8d1b4a99361e7e77c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -518,16 +518,29 @@ static bool intel_fbdev_init_bios(struct drm_device *dev,
 
                /*
                 * See if the plane fb we found above will fit on this
-                * pipe.  Note we need to use the selected fb's bpp rather
-                * than the current pipe's, since they could be different.
+                * pipe.  Note we need to use the selected fb's pitch and bpp
+                * rather than the current pipe's, since they differ.
                 */
-               cur_size = intel_crtc->config.adjusted_mode.crtc_hdisplay *
-                       intel_crtc->config.adjusted_mode.crtc_vdisplay;
-               DRM_DEBUG_KMS("pipe %c area: %d\n", pipe_name(intel_crtc->pipe),
+               cur_size = intel_crtc->config.adjusted_mode.crtc_hdisplay;
+               cur_size = cur_size * fb->base.bits_per_pixel / 8;
+               if (fb->base.pitches[0] < cur_size) {
+                       DRM_DEBUG_KMS("fb not wide enough for plane %c (%d vs %d)\n",
+                                     pipe_name(intel_crtc->pipe),
+                                     cur_size, fb->base.pitches[0]);
+                       plane_config = NULL;
+                       fb = NULL;
+                       break;
+               }
+
+               cur_size = intel_crtc->config.adjusted_mode.crtc_vdisplay;
+               cur_size = ALIGN(cur_size, plane_config->tiled ? (IS_GEN2(dev) ? 16 : 8) : 1);
+               cur_size *= fb->base.pitches[0];
+               DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n",
+                             pipe_name(intel_crtc->pipe),
+                             intel_crtc->config.adjusted_mode.crtc_hdisplay,
+                             intel_crtc->config.adjusted_mode.crtc_vdisplay,
+                             fb->base.bits_per_pixel,
                              cur_size);
-               cur_size *= fb->base.bits_per_pixel / 8;
-               DRM_DEBUG_KMS("total size %d (bpp %d)\n", cur_size,
-                             fb->base.bits_per_pixel / 8);
 
                if (cur_size > max_size) {
                        DRM_DEBUG_KMS("fb not big enough for plane %c (%d vs %d)\n",