rk30: fix for gpio6 support

diff --git a/arch/arm/mach-rk30/include/mach/gpio.h b/arch/arm/mach-rk30/include/mach/gpio.h
index 163a9f6f868c12751e4d549b5a7c3060a835d949..8fcf3234c2c6326c4eb4e2d135e291f0ecec524e 100755 (executable)
--- a/arch/arm/mach-rk30/include/mach/gpio.h
+++ b/arch/arm/mach-rk30/include/mach/gpio.h
@@ -46,15 +46,8 @@ typedef enum GPIOIntType {
 #define        GPIO_EXT_PORT           0x50
 #define        GPIO_LS_SYNC            0x60
 
-#define RK30_ID_GPIO0                  0
-#define RK30_ID_GPIO1                  1
-#define RK30_ID_GPIO2                  2
-#define RK30_ID_GPIO3                  3
-#define RK30_ID_GPIO4                  4
-#define RK30_ID_GPIO5                  5
-
 #define NUM_GROUP                              32
-#define MAX_BANK                               7
+#define MAX_BANK                               6
 
 #define PIN_BASE                               NR_GIC_IRQS
 
@@ -262,22 +255,22 @@ typedef enum GPIOIntType {
 #define        RK30_PIN4_PD6           (4*NUM_GROUP + PIN_BASE + 30)
 #define        RK30_PIN4_PD7           (4*NUM_GROUP + PIN_BASE + 31)
 
-#define        RK30_PIN6_PA0           (6*NUM_GROUP + PIN_BASE + 0)
-#define        RK30_PIN6_PA1           (6*NUM_GROUP + PIN_BASE + 1)
-#define        RK30_PIN6_PA2           (6*NUM_GROUP + PIN_BASE + 2)
-#define        RK30_PIN6_PA3           (6*NUM_GROUP + PIN_BASE + 3)
-#define        RK30_PIN6_PA4           (6*NUM_GROUP + PIN_BASE + 4)
-#define        RK30_PIN6_PA5           (6*NUM_GROUP + PIN_BASE + 5)
-#define        RK30_PIN6_PA6           (6*NUM_GROUP + PIN_BASE + 6)
-#define        RK30_PIN6_PA7           (6*NUM_GROUP + PIN_BASE + 7)
-#define        RK30_PIN6_PB0           (6*NUM_GROUP + PIN_BASE + 8)
-#define        RK30_PIN6_PB1           (6*NUM_GROUP + PIN_BASE + 9)
-#define        RK30_PIN6_PB2           (6*NUM_GROUP + PIN_BASE + 10)
-#define        RK30_PIN6_PB3           (6*NUM_GROUP + PIN_BASE + 11)
-#define        RK30_PIN6_PB4           (6*NUM_GROUP + PIN_BASE + 12)
-#define        RK30_PIN6_PB5           (6*NUM_GROUP + PIN_BASE + 13)
-#define        RK30_PIN6_PB6           (6*NUM_GROUP + PIN_BASE + 14)
-#define        RK30_PIN6_PB7           (6*NUM_GROUP + PIN_BASE + 15)
+#define        RK30_PIN6_PA0           (5*NUM_GROUP + PIN_BASE + 0)
+#define        RK30_PIN6_PA1           (5*NUM_GROUP + PIN_BASE + 1)
+#define        RK30_PIN6_PA2           (5*NUM_GROUP + PIN_BASE + 2)
+#define        RK30_PIN6_PA3           (5*NUM_GROUP + PIN_BASE + 3)
+#define        RK30_PIN6_PA4           (5*NUM_GROUP + PIN_BASE + 4)
+#define        RK30_PIN6_PA5           (5*NUM_GROUP + PIN_BASE + 5)
+#define        RK30_PIN6_PA6           (5*NUM_GROUP + PIN_BASE + 6)
+#define        RK30_PIN6_PA7           (5*NUM_GROUP + PIN_BASE + 7)
+#define        RK30_PIN6_PB0           (5*NUM_GROUP + PIN_BASE + 8)
+#define        RK30_PIN6_PB1           (5*NUM_GROUP + PIN_BASE + 9)
+#define        RK30_PIN6_PB2           (5*NUM_GROUP + PIN_BASE + 10)
+#define        RK30_PIN6_PB3           (5*NUM_GROUP + PIN_BASE + 11)
+#define        RK30_PIN6_PB4           (5*NUM_GROUP + PIN_BASE + 12)
+#define        RK30_PIN6_PB5           (5*NUM_GROUP + PIN_BASE + 13)
+#define        RK30_PIN6_PB6           (5*NUM_GROUP + PIN_BASE + 14)
+#define        RK30_PIN6_PB7           (5*NUM_GROUP + PIN_BASE + 15)
 
 #if defined(CONFIG_SPI_FPGA_GPIO)
 #define        FPGA_PIO0_00 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 0)

diff --git a/drivers/gpio/gpio-rk30.c b/drivers/gpio/gpio-rk30.c
index 7d13bbda9cfdea2a4e95dd3e7f9b467a572e8920..8db816e8c44705715153aa7eb386621265ac783b 100755 (executable)
--- a/drivers/gpio/gpio-rk30.c
+++ b/drivers/gpio/gpio-rk30.c
@@ -68,8 +68,8 @@ static int rk30_gpiolib_to_irq(struct gpio_chip *chip,unsigned offset);
                        .pull_updown      = rk30_gpiolib_pull_updown,   \
                        .dbg_show         = rk30_gpiolib_dbg_show,      \
                        .to_irq           = rk30_gpiolib_to_irq,        \
-                       .base             = PIN_BASE + ID*NUM_GROUP,    \
-                       .ngpio            = NUM_GROUP,                  \
+                       .base             = ID < 6 ? PIN_BASE + ID*NUM_GROUP : PIN_BASE + 5*NUM_GROUP,  \
+                       .ngpio            = ID < 6 ? NUM_GROUP : 16,    \
                },                                                      \
                .id = ID, \
                .irq = IRQ_GPIO##ID, \
@@ -403,7 +403,7 @@ void __init rk30_gpio_init(void)
        bank = rk30_gpio_banks;
        pin = PIN_BASE;
 
-       for (i = 0; i < ARRAY_SIZE(rk30_gpio_banks); i++, bank++, pin += 32) {
+       for (i = 0; i < ARRAY_SIZE(rk30_gpio_banks); i++, bank++) {
                spin_lock_init(&bank->lock);
                bank->clk = clk_get(NULL, bank->chip.label);
                clk_enable(bank->clk);
@@ -411,11 +411,14 @@ void __init rk30_gpio_init(void)
 
                __raw_writel(0, bank->regbase + GPIO_INTEN);
                for (j = 0; j < 32; j++) {
-                       unsigned int irq = gpio_to_irq(pin + j);
+                       unsigned int irq = gpio_to_irq(pin);
+                       if (pin > MAX_PIN)
+                               break;
                        irq_set_lockdep_class(irq, &gpio_lock_class);
                        irq_set_chip_data(irq, bank);
                        irq_set_chip_and_handler(irq, &rk30_gpio_irq_chip, handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID);
+                       pin++;
                }
 
                irq_set_handler_data(bank->irq, bank);