A better fix for my previous patch, MOVZQI2PQIrr just requires SSE2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49986 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 982b0dc6df66be1110e3121006b0f020bdb3d6bc..824ffe3800cedf020c4659161d81ef52867f6621 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -2312,7 +2312,7 @@ def : Pat<(v2f64 (vector_shuffle immAllZerosV_bc,
                                   (v2f64 (scalar_to_vector 
                                        (f64 (bitconvert GR64:$src)))),
                                   MOVL_shuffle_mask)),
-          (MOVZQI2PQIrr GR64:$src)>, Requires<[HasSSE3]>;
+          (MOVZQI2PQIrr GR64:$src)>, Requires<[HasSSE2]>;
           
 
 let AddedComplexity = 20 in {

diff --git a/test/CodeGen/X86/vec_shuffle-17.ll b/test/CodeGen/X86/vec_shuffle-17.ll
index 990a48b453dac2028db6f3e15fb7cf6a6a517f7d..992d79184b87dec1e38f0ee48cf27e2317ad7346 100644 (file)
--- a/test/CodeGen/X86/vec_shuffle-17.ll
+++ b/test/CodeGen/X86/vec_shuffle-17.ll
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse3 | grep {movd.*%rdi, %xmm0}
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse3 | not grep xor
+; RUN: llvm-as < %s | llc -march=x86-64 | grep {movd.*%rdi, %xmm0}
+; RUN: llvm-as < %s | llc -march=x86-64 | not grep xor
 ; PR2108
 
 define <2 x i64> @doload64(i64 %x) nounwind  {