at91: switch to CLKDEV_LOOKUP
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Wed, 2 Feb 2011 06:27:07 +0000 (07:27 +0100)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Wed, 25 May 2011 15:04:34 +0000 (23:04 +0800)
we do not change the clock naming convention so does not need to switch
the AVR32 yet

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
22 files changed:
arch/arm/Kconfig
arch/arm/mach-at91/at572d940hf.c
arch/arm/mach-at91/at572d940hf_devices.c
arch/arm/mach-at91/at91cap9.c
arch/arm/mach-at91/at91cap9_devices.c
arch/arm/mach-at91/at91rm9200.c
arch/arm/mach-at91/at91rm9200_devices.c
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9260_devices.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9261_devices.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9263_devices.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9g45_devices.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-at91/at91sam9rl_devices.c
arch/arm/mach-at91/at91x40.c
arch/arm/mach-at91/clock.c
arch/arm/mach-at91/clock.h
arch/arm/mach-at91/generic.h
arch/arm/mach-at91/include/mach/clkdev.h [new file with mode: 0644]

index 7275009686e64a9336ff6fb902d57c6363f1d4fd..5fd0be92f70b5e8a2b19917e92af24d74f2c541c 100644 (file)
@@ -294,6 +294,7 @@ config ARCH_AT91
        bool "Atmel AT91"
        select ARCH_REQUIRE_GPIOLIB
        select HAVE_CLK
+       select CLKDEV_LOOKUP
        help
          This enables support for systems based on the Atmel AT91RM9200,
          AT91SAM9 and AT91CAP9 processors.
index bacd3764b6c58ed2ed938346811b11a144087fe7..d06990777ffe84a9067a8467065a217296e84d96 100644 (file)
@@ -205,6 +205,21 @@ static struct clk *periph_clocks[] __initdata = {
        /* irq0 .. irq2 */
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+       CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+       CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
+
 /*
  * The five programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
@@ -262,6 +277,11 @@ static void __init at572d940hf_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
@@ -272,6 +292,18 @@ static void __init at572d940hf_register_clocks(void)
        clk_register(&hck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at572d940hf_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
index e52c8e078b0ff73185705aa792dbd61155861fa8..14863b8e7e6aa454d0aea5347ff94c5137bf0c0a 100644 (file)
@@ -532,7 +532,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 
-               at91_clock_associate("spi0_clk", &at572d940hf_spi0_device.dev, "spi_clk");
                platform_device_register(&at572d940hf_spi0_device);
        }
        if (enable_spi1) {
@@ -540,7 +539,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PC1, 0);     /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PC2, 0);     /* SPI1_SPCK */
 
-               at91_clock_associate("spi1_clk", &at572d940hf_spi1_device.dev, "spi_clk");
                platform_device_register(&at572d940hf_spi1_device);
        }
 }
@@ -587,10 +585,6 @@ static struct platform_device at572d940hf_tcb_device = {
 
 static void __init at91_add_device_tc(void)
 {
-       /* this chip has a separate clock and irq for each TC channel */
-       at91_clock_associate("tc0_clk", &at572d940hf_tcb_device.dev, "t0_clk");
-       at91_clock_associate("tc1_clk", &at572d940hf_tcb_device.dev, "t1_clk");
-       at91_clock_associate("tc2_clk", &at572d940hf_tcb_device.dev, "t2_clk");
        platform_device_register(&at572d940hf_tcb_device);
 }
 #else
@@ -828,22 +822,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                case 0:         /* DBGU */
                        pdev = &at572d940hf_dbgu_device;
                        configure_dbgu_pins();
-                       at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT572D940HF_ID_US0:
                        pdev = &at572d940hf_uart0_device;
                        configure_usart0_pins(pins);
-                       at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT572D940HF_ID_US1:
                        pdev = &at572d940hf_uart1_device;
                        configure_usart1_pins(pins);
-                       at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT572D940HF_ID_US2:
                        pdev = &at572d940hf_uart2_device;
                        configure_usart2_pins(pins);
-                       at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
@@ -857,8 +847,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 
 void __init at91_set_serial_console(unsigned portnr)
 {
-       if (portnr < ATMEL_MAX_UART)
+       if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+               at572d940hf_set_console_clock(portnr);
+       }
 }
 
 void __init at91_add_device_serial(void)
index 69df2bb4a703606c5bf1ab40f7fc803997ddca56..17fae4a42ab587f413025780f5228b7f0bfc7553 100644 (file)
@@ -222,6 +222,25 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq1
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+       CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+       CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+       CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
+       CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk),
+       CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
+
 /*
  * The four programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
@@ -258,12 +277,29 @@ static void __init at91cap9_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
        clk_register(&pck3);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91cap9_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
index ffda9099f6faccc41c2955eddc5fc7e860c17e13..cd850ed6f33542b5a70a7d7bfcbe0080f5d05619 100644 (file)
@@ -181,10 +181,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
 
        /* Pullup pin is handled internally by USB device peripheral */
 
-       /* Clocks */
-       at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
-       at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
-
        platform_device_register(&at91_usba_udc_device);
 }
 #else
@@ -355,7 +351,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                }
 
                mmc0_data = *data;
-               at91_clock_associate("mci0_clk", &at91cap9_mmc0_device.dev, "mci_clk");
                platform_device_register(&at91cap9_mmc0_device);
        } else {                        /* MCI1 */
                /* CLK */
@@ -373,7 +368,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                }
 
                mmc1_data = *data;
-               at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk");
                platform_device_register(&at91cap9_mmc1_device);
        }
 }
@@ -614,7 +608,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 
-               at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk");
                platform_device_register(&at91cap9_spi0_device);
        }
        if (enable_spi1) {
@@ -622,7 +615,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
 
-               at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk");
                platform_device_register(&at91cap9_spi1_device);
        }
 }
@@ -659,8 +651,6 @@ static struct platform_device at91cap9_tcb_device = {
 
 static void __init at91_add_device_tc(void)
 {
-       /* this chip has one clock and irq for all three TC channels */
-       at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
        platform_device_register(&at91cap9_tcb_device);
 }
 #else
@@ -1001,12 +991,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91CAP9_ID_SSC0:
                pdev = &at91cap9_ssc0_device;
                configure_ssc0_pins(pins);
-               at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
                break;
        case AT91CAP9_ID_SSC1:
                pdev = &at91cap9_ssc1_device;
                configure_ssc1_pins(pins);
-               at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
                break;
        default:
                return;
@@ -1205,22 +1193,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                case 0:         /* DBGU */
                        pdev = &at91cap9_dbgu_device;
                        configure_dbgu_pins();
-                       at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91CAP9_ID_US0:
                        pdev = &at91cap9_uart0_device;
                        configure_usart0_pins(pins);
-                       at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91CAP9_ID_US1:
                        pdev = &at91cap9_uart1_device;
                        configure_usart1_pins(pins);
-                       at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91CAP9_ID_US2:
                        pdev = &at91cap9_uart2_device;
                        configure_usart2_pins(pins);
-                       at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
@@ -1234,8 +1218,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 
 void __init at91_set_serial_console(unsigned portnr)
 {
-       if (portnr < ATMEL_MAX_UART)
+       if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+               at91cap9_set_console_clock(portnr);
+       }
 }
 
 void __init at91_add_device_serial(void)
index 164a98ed8888fc50f545bbbf958ad78399a23e70..d3638bd994da74dccf74cd8b2a44c7cd8cbd5bd4 100644 (file)
@@ -191,6 +191,26 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq6
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+       CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+       CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
+       CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
+       CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
+       CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk),
+       CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk),
+       CLKDEV_CON_DEV_ID("ssc", "ssc.2", &ssc2_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+};
+
 /*
  * The four programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
@@ -227,12 +247,29 @@ static void __init at91rm9200_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
        clk_register(&pck3);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91rm9200_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
index 761559e589a3b20542f561ebb6af15f5fe5b3210..a0ba475be04cd23a7aeba30d933c8eead4fb3d1f 100644 (file)
@@ -644,15 +644,7 @@ static struct platform_device at91rm9200_tcb1_device = {
 
 static void __init at91_add_device_tc(void)
 {
-       /* this chip has a separate clock and irq for each TC channel */
-       at91_clock_associate("tc0_clk", &at91rm9200_tcb0_device.dev, "t0_clk");
-       at91_clock_associate("tc1_clk", &at91rm9200_tcb0_device.dev, "t1_clk");
-       at91_clock_associate("tc2_clk", &at91rm9200_tcb0_device.dev, "t2_clk");
        platform_device_register(&at91rm9200_tcb0_device);
-
-       at91_clock_associate("tc3_clk", &at91rm9200_tcb1_device.dev, "t0_clk");
-       at91_clock_associate("tc4_clk", &at91rm9200_tcb1_device.dev, "t1_clk");
-       at91_clock_associate("tc5_clk", &at91rm9200_tcb1_device.dev, "t2_clk");
        platform_device_register(&at91rm9200_tcb1_device);
 }
 #else
@@ -849,17 +841,14 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91RM9200_ID_SSC0:
                pdev = &at91rm9200_ssc0_device;
                configure_ssc0_pins(pins);
-               at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
                break;
        case AT91RM9200_ID_SSC1:
                pdev = &at91rm9200_ssc1_device;
                configure_ssc1_pins(pins);
-               at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
                break;
        case AT91RM9200_ID_SSC2:
                pdev = &at91rm9200_ssc2_device;
                configure_ssc2_pins(pins);
-               at91_clock_associate("ssc2_clk", &pdev->dev, "ssc");
                break;
        default:
                return;
@@ -1115,27 +1104,22 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                case 0:         /* DBGU */
                        pdev = &at91rm9200_dbgu_device;
                        configure_dbgu_pins();
-                       at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91RM9200_ID_US0:
                        pdev = &at91rm9200_uart0_device;
                        configure_usart0_pins(pins);
-                       at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91RM9200_ID_US1:
                        pdev = &at91rm9200_uart1_device;
                        configure_usart1_pins(pins);
-                       at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91RM9200_ID_US2:
                        pdev = &at91rm9200_uart2_device;
                        configure_usart2_pins(pins);
-                       at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                case AT91RM9200_ID_US3:
                        pdev = &at91rm9200_uart3_device;
                        configure_usart3_pins(pins);
-                       at91_clock_associate("usart3_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
@@ -1149,8 +1133,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 
 void __init at91_set_serial_console(unsigned portnr)
 {
-       if (portnr < ATMEL_MAX_UART)
+       if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+               at91rm9200_set_console_clock(portnr);
+       }
 }
 
 void __init at91_add_device_serial(void)
index 5430669d746205f3e9841b66668bd07b859cfead..7d606b04d313c5800359849ddff022a827655d87 100644 (file)
@@ -231,6 +231,28 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq2
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+       CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+       CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+       CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk),
+       CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
+       CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.5", &usart4_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.6", &usart5_clk),
+};
+
 /*
  * The two programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
@@ -255,10 +277,27 @@ static void __init at91sam9260_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        clk_register(&pck0);
        clk_register(&pck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9260_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
index 6f8ec8d16d5ad621a383c829f2112a6d7b147ba6..1fdeb9058a760a865ba0463d6fdbca89cd448bfb 100644 (file)
@@ -609,7 +609,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
 
-               at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
                platform_device_register(&at91sam9260_spi0_device);
        }
        if (enable_spi1) {
@@ -617,7 +616,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
 
-               at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
                platform_device_register(&at91sam9260_spi1_device);
        }
 }
@@ -694,15 +692,7 @@ static struct platform_device at91sam9260_tcb1_device = {
 
 static void __init at91_add_device_tc(void)
 {
-       /* this chip has a separate clock and irq for each TC channel */
-       at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
-       at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
-       at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
        platform_device_register(&at91sam9260_tcb0_device);
-
-       at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
-       at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
-       at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
        platform_device_register(&at91sam9260_tcb1_device);
 }
 #else
@@ -820,7 +810,6 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9260_ID_SSC:
                pdev = &at91sam9260_ssc_device;
                configure_ssc_pins(pins);
-               at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -1145,37 +1134,30 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                case 0:         /* DBGU */
                        pdev = &at91sam9260_dbgu_device;
                        configure_dbgu_pins();
-                       at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US0:
                        pdev = &at91sam9260_uart0_device;
                        configure_usart0_pins(pins);
-                       at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US1:
                        pdev = &at91sam9260_uart1_device;
                        configure_usart1_pins(pins);
-                       at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US2:
                        pdev = &at91sam9260_uart2_device;
                        configure_usart2_pins(pins);
-                       at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US3:
                        pdev = &at91sam9260_uart3_device;
                        configure_usart3_pins(pins);
-                       at91_clock_associate("usart3_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US4:
                        pdev = &at91sam9260_uart4_device;
                        configure_usart4_pins();
-                       at91_clock_associate("usart4_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US5:
                        pdev = &at91sam9260_uart5_device;
                        configure_usart5_pins();
-                       at91_clock_associate("usart5_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
@@ -1189,8 +1171,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 
 void __init at91_set_serial_console(unsigned portnr)
 {
-       if (portnr < ATMEL_MAX_UART)
+       if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+               at91sam9260_set_console_clock(portnr);
+       }
 }
 
 void __init at91_add_device_serial(void)
index e3bafaebe0107f002d949275c2ae232b588a56b2..c1483168c97a523569ff04676cf7f964e7282313 100644 (file)
@@ -178,6 +178,24 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq2
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+       CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+       CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
+
 /*
  * The four programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
@@ -228,6 +246,11 @@ static void __init at91sam9261_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
@@ -237,6 +260,18 @@ static void __init at91sam9261_register_clocks(void)
        clk_register(&hck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9261_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
index 8792f9bfb6b0fab870e6fe5845d3bf7d1f7fba17..3eb4538fceebeb243aba31185861d3639d05c9c3 100644 (file)
@@ -426,7 +426,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 
-               at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
                platform_device_register(&at91sam9261_spi0_device);
        }
        if (enable_spi1) {
@@ -434,7 +433,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB31, 0);    /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB29, 0);    /* SPI1_SPCK */
 
-               at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
                platform_device_register(&at91sam9261_spi1_device);
        }
 }
@@ -581,10 +579,6 @@ static struct platform_device at91sam9261_tcb_device = {
 
 static void __init at91_add_device_tc(void)
 {
-       /* this chip has a separate clock and irq for each TC channel */
-       at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk");
-       at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk");
-       at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk");
        platform_device_register(&at91sam9261_tcb_device);
 }
 #else
@@ -786,17 +780,14 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9261_ID_SSC0:
                pdev = &at91sam9261_ssc0_device;
                configure_ssc0_pins(pins);
-               at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9261_ID_SSC1:
                pdev = &at91sam9261_ssc1_device;
                configure_ssc1_pins(pins);
-               at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9261_ID_SSC2:
                pdev = &at91sam9261_ssc2_device;
                configure_ssc2_pins(pins);
-               at91_clock_associate("ssc2_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -995,22 +986,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                case 0:         /* DBGU */
                        pdev = &at91sam9261_dbgu_device;
                        configure_dbgu_pins();
-                       at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9261_ID_US0:
                        pdev = &at91sam9261_uart0_device;
                        configure_usart0_pins(pins);
-                       at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9261_ID_US1:
                        pdev = &at91sam9261_uart1_device;
                        configure_usart1_pins(pins);
-                       at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9261_ID_US2:
                        pdev = &at91sam9261_uart2_device;
                        configure_usart2_pins(pins);
-                       at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
@@ -1024,8 +1011,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 
 void __init at91_set_serial_console(unsigned portnr)
 {
-       if (portnr < ATMEL_MAX_UART)
+       if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+               at91sam9261_set_console_clock(portnr);
+       }
 }
 
 void __init at91_add_device_serial(void)
index 6a085fedf6a3017fd02d60d32e233944023fce38..dc28477d14ffa158e0e0ae8031815ada848b9c51 100644 (file)
@@ -199,6 +199,23 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq1
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+       CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+       CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
+
 /*
  * The four programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
@@ -235,12 +252,29 @@ static void __init at91sam9263_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
        clk_register(&pck3);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9263_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
index 47a9f965bbb59ee23218aec197d71c9c6c79a923..ffe081b77ed0f5bfafc97116919f0c381b06be98 100644 (file)
@@ -308,7 +308,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                }
 
                mmc0_data = *data;
-               at91_clock_associate("mci0_clk", &at91sam9263_mmc0_device.dev, "mci_clk");
                platform_device_register(&at91sam9263_mmc0_device);
        } else {                        /* MCI1 */
                /* CLK */
@@ -339,7 +338,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                }
 
                mmc1_data = *data;
-               at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
                platform_device_register(&at91sam9263_mmc1_device);
        }
 }
@@ -686,7 +684,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 
-               at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
                platform_device_register(&at91sam9263_spi0_device);
        }
        if (enable_spi1) {
@@ -694,7 +691,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
 
-               at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
                platform_device_register(&at91sam9263_spi1_device);
        }
 }
@@ -941,8 +937,6 @@ static struct platform_device at91sam9263_tcb_device = {
 
 static void __init at91_add_device_tc(void)
 {
-       /* this chip has one clock and irq for all three TC channels */
-       at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
        platform_device_register(&at91sam9263_tcb_device);
 }
 #else
@@ -1171,12 +1165,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9263_ID_SSC0:
                pdev = &at91sam9263_ssc0_device;
                configure_ssc0_pins(pins);
-               at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9263_ID_SSC1:
                pdev = &at91sam9263_ssc1_device;
                configure_ssc1_pins(pins);
-               at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -1376,22 +1368,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                case 0:         /* DBGU */
                        pdev = &at91sam9263_dbgu_device;
                        configure_dbgu_pins();
-                       at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9263_ID_US0:
                        pdev = &at91sam9263_uart0_device;
                        configure_usart0_pins(pins);
-                       at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9263_ID_US1:
                        pdev = &at91sam9263_uart1_device;
                        configure_usart1_pins(pins);
-                       at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9263_ID_US2:
                        pdev = &at91sam9263_uart2_device;
                        configure_usart2_pins(pins);
-                       at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
@@ -1405,8 +1393,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 
 void __init at91_set_serial_console(unsigned portnr)
 {
-       if (portnr < ATMEL_MAX_UART)
+       if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+               at91sam9263_set_console_clock(portnr);
+       }
 }
 
 void __init at91_add_device_serial(void)
index 024e456b943ff4f63dc20416fec74db70a7e1a0f..2bb6ff9af1c7fede95a7879c3381dc0a1c424d8c 100644 (file)
@@ -184,22 +184,6 @@ static struct clk vdec_clk = {
        .type           = CLK_TYPE_PERIPHERAL,
 };
 
-/* One additional fake clock for ohci */
-static struct clk ohci_clk = {
-       .name           = "ohci_clk",
-       .pmc_mask       = 0,
-       .type           = CLK_TYPE_PERIPHERAL,
-       .parent         = &uhphs_clk,
-};
-
-/* One additional fake clock for second TC block */
-static struct clk tcb1_clk = {
-       .name           = "tcb1_clk",
-       .pmc_mask       = 0,
-       .type           = CLK_TYPE_PERIPHERAL,
-       .parent         = &tcb0_clk,
-};
-
 static struct clk *periph_clocks[] __initdata = {
        &pioA_clk,
        &pioB_clk,
@@ -228,8 +212,30 @@ static struct clk *periph_clocks[] __initdata = {
        &udphs_clk,
        &mmc1_clk,
        // irq0
-       &ohci_clk,
-       &tcb1_clk,
+};
+
+static struct clk_lookup periph_clocks_lookups[] = {
+       /* One additional fake clock for ohci */
+       CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
+       CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci.0", &uhphs_clk),
+       CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+       CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+       CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+       CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+       CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
 };
 
 /*
@@ -256,6 +262,11 @@ static void __init at91sam9g45_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
                clk_register(&vdec_clk);
 
@@ -263,6 +274,18 @@ static void __init at91sam9g45_register_clocks(void)
        clk_register(&pck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9g45_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
index eee27eed913341ccac1e14c5e1a2edbac7219caa..05674865bc214d5642885038c514b5c4b067e7a5 100644 (file)
@@ -180,7 +180,6 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
        }
 
        usbh_ehci_data = *data;
-       at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk");
        platform_device_register(&at91_usbh_ehci_device);
 }
 #else
@@ -266,10 +265,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
 
        /* Pullup pin is handled internally by USB device peripheral */
 
-       /* Clocks */
-       at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
-       at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
-
        platform_device_register(&at91_usba_udc_device);
 }
 #else
@@ -478,7 +473,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
                }
 
                mmc0_data = *data;
-               at91_clock_associate("mci0_clk", &at91sam9g45_mmc0_device.dev, "mci_clk");
                platform_device_register(&at91sam9g45_mmc0_device);
 
        } else {                        /* MCI1 */
@@ -504,7 +498,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
                }
 
                mmc1_data = *data;
-               at91_clock_associate("mci1_clk", &at91sam9g45_mmc1_device.dev, "mci_clk");
                platform_device_register(&at91sam9g45_mmc1_device);
 
        }
@@ -801,7 +794,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI0_MOSI */
                at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI0_SPCK */
 
-               at91_clock_associate("spi0_clk", &at91sam9g45_spi0_device.dev, "spi_clk");
                platform_device_register(&at91sam9g45_spi0_device);
        }
        if (enable_spi1) {
@@ -809,7 +801,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB15, 0);    /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB16, 0);    /* SPI1_SPCK */
 
-               at91_clock_associate("spi1_clk", &at91sam9g45_spi1_device.dev, "spi_clk");
                platform_device_register(&at91sam9g45_spi1_device);
        }
 }
@@ -999,10 +990,7 @@ static struct platform_device at91sam9g45_tcb1_device = {
 
 static void __init at91_add_device_tc(void)
 {
-       /* this chip has one clock and irq for all six TC channels */
-       at91_clock_associate("tcb0_clk", &at91sam9g45_tcb0_device.dev, "t0_clk");
        platform_device_register(&at91sam9g45_tcb0_device);
-       at91_clock_associate("tcb1_clk", &at91sam9g45_tcb1_device.dev, "t0_clk");
        platform_device_register(&at91sam9g45_tcb1_device);
 }
 #else
@@ -1286,12 +1274,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9G45_ID_SSC0:
                pdev = &at91sam9g45_ssc0_device;
                configure_ssc0_pins(pins);
-               at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9G45_ID_SSC1:
                pdev = &at91sam9g45_ssc1_device;
                configure_ssc1_pins(pins);
-               at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -1533,27 +1519,22 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                case 0:         /* DBGU */
                        pdev = &at91sam9g45_dbgu_device;
                        configure_dbgu_pins();
-                       at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9G45_ID_US0:
                        pdev = &at91sam9g45_uart0_device;
                        configure_usart0_pins(pins);
-                       at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9G45_ID_US1:
                        pdev = &at91sam9g45_uart1_device;
                        configure_usart1_pins(pins);
-                       at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9G45_ID_US2:
                        pdev = &at91sam9g45_uart2_device;
                        configure_usart2_pins(pins);
-                       at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9G45_ID_US3:
                        pdev = &at91sam9g45_uart3_device;
                        configure_usart3_pins(pins);
-                       at91_clock_associate("usart3_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
@@ -1567,8 +1548,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 
 void __init at91_set_serial_console(unsigned portnr)
 {
-       if (portnr < ATMEL_MAX_UART)
+       if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+               at91sam9g45_set_console_clock(portnr);
+       }
 }
 
 void __init at91_add_device_serial(void)
index 67c869783c7e9e716eb896cbaefdf5b22e18cbf9..1a40f16b66c849dd71a14dd238e8df60df284876 100644 (file)
@@ -190,6 +190,24 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+       CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+       CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+       CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+};
+
 /*
  * The two programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
@@ -214,10 +232,27 @@ static void __init at91sam9rl_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        clk_register(&pck0);
        clk_register(&pck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9rl_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
index d194b085848efc7138bf6688420cb7f176f7e221..c296045f2b6aa2099cca149b520192dc0ab89034 100644 (file)
@@ -155,10 +155,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
 
        /* Pullup pin is handled internally by USB device peripheral */
 
-       /* Clocks */
-       at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
-       at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
-
        platform_device_register(&at91_usba_udc_device);
 }
 #else
@@ -605,10 +601,6 @@ static struct platform_device at91sam9rl_tcb_device = {
 
 static void __init at91_add_device_tc(void)
 {
-       /* this chip has a separate clock and irq for each TC channel */
-       at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk");
-       at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk");
-       at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk");
        platform_device_register(&at91sam9rl_tcb_device);
 }
 #else
@@ -892,12 +884,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9RL_ID_SSC0:
                pdev = &at91sam9rl_ssc0_device;
                configure_ssc0_pins(pins);
-               at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9RL_ID_SSC1:
                pdev = &at91sam9rl_ssc1_device;
                configure_ssc1_pins(pins);
-               at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -1147,27 +1137,22 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                case 0:         /* DBGU */
                        pdev = &at91sam9rl_dbgu_device;
                        configure_dbgu_pins();
-                       at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9RL_ID_US0:
                        pdev = &at91sam9rl_uart0_device;
                        configure_usart0_pins(pins);
-                       at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9RL_ID_US1:
                        pdev = &at91sam9rl_uart1_device;
                        configure_usart1_pins(pins);
-                       at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9RL_ID_US2:
                        pdev = &at91sam9rl_uart2_device;
                        configure_usart2_pins(pins);
-                       at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9RL_ID_US3:
                        pdev = &at91sam9rl_uart3_device;
                        configure_usart3_pins(pins);
-                       at91_clock_associate("usart3_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
@@ -1181,8 +1166,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 
 void __init at91_set_serial_console(unsigned portnr)
 {
-       if (portnr < ATMEL_MAX_UART)
+       if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+               at91sam9rl_set_console_clock(portnr);
+       }
 }
 
 void __init at91_add_device_serial(void)
index ad3ec85b27906c5ac38c3d8f11432f0e87d61985..56ba3bd035aeff76f6bc0db6459c20d47ab9d09f 100644 (file)
@@ -37,11 +37,6 @@ unsigned long clk_get_rate(struct clk *clk)
        return AT91X40_MASTER_CLOCK;
 }
 
-struct clk *clk_get(struct device *dev, const char *id)
-{
-       return NULL;
-}
-
 void __init at91x40_initialize(unsigned long main_clock)
 {
        at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
index 9113da6845f17482437ed984bd978b9b28378dfe..ac103cbdbf35180cb1f6dc557a43bb070b4e8c2a 100644 (file)
@@ -163,7 +163,7 @@ static struct clk udpck = {
        .parent         = &pllb,
        .mode           = pmc_sys_mode,
 };
-static struct clk utmi_clk = {
+struct clk utmi_clk = {
        .name           = "utmi_clk",
        .parent         = &main_clk,
        .pmc_mask       = AT91_PMC_UPLLEN,      /* in CKGR_UCKR */
@@ -182,7 +182,7 @@ static struct clk uhpck = {
  * memory, interfaces to on-chip peripherals, the AIC, and sometimes more
  * (e.g baud rate generation).  It's sourced from one of the primary clocks.
  */
-static struct clk mck = {
+struct clk mck = {
        .name           = "mck",
        .pmc_mask       = AT91_PMC_MCKRDY,      /* in PMC_SR */
 };
@@ -215,43 +215,6 @@ static struct clk __init *at91_css_to_clk(unsigned long css)
        return NULL;
 }
 
-/*
- * Associate a particular clock with a function (eg, "uart") and device.
- * The drivers can then request the same 'function' with several different
- * devices and not care about which clock name to use.
- */
-void __init at91_clock_associate(const char *id, struct device *dev, const char *func)
-{
-       struct clk *clk = clk_get(NULL, id);
-
-       if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
-               return;
-
-       clk->function = func;
-       clk->dev = dev;
-}
-
-/* clocks cannot be de-registered no refcounting necessary */
-struct clk *clk_get(struct device *dev, const char *id)
-{
-       struct clk *clk;
-
-       list_for_each_entry(clk, &clocks, node) {
-               if (strcmp(id, clk->name) == 0)
-                       return clk;
-               if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
-                       return clk;
-       }
-
-       return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
 static void __clk_enable(struct clk *clk)
 {
        if (clk->parent)
@@ -498,32 +461,38 @@ postcore_initcall(at91_clk_debugfs_init);
 /*------------------------------------------------------------------------*/
 
 /* Register a new clock */
+static void __init at91_clk_add(struct clk *clk)
+{
+       list_add_tail(&clk->node, &clocks);
+
+       clk->cl.con_id = clk->name;
+       clk->cl.clk = clk;
+       clkdev_add(&clk->cl);
+}
+
 int __init clk_register(struct clk *clk)
 {
        if (clk_is_peripheral(clk)) {
                if (!clk->parent)
                        clk->parent = &mck;
                clk->mode = pmc_periph_mode;
-               list_add_tail(&clk->node, &clocks);
        }
        else if (clk_is_sys(clk)) {
                clk->parent = &mck;
                clk->mode = pmc_sys_mode;
-
-               list_add_tail(&clk->node, &clocks);
        }
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
        else if (clk_is_programmable(clk)) {
                clk->mode = pmc_sys_mode;
                init_programmable_clock(clk);
-               list_add_tail(&clk->node, &clocks);
        }
 #endif
 
+       at91_clk_add(clk);
+
        return 0;
 }
 
-
 /*------------------------------------------------------------------------*/
 
 static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
@@ -754,19 +723,19 @@ int __init at91_clock_init(unsigned long main_clock)
 
        /* Register the PMC's standard clocks */
        for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
-               list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
+               at91_clk_add(standard_pmc_clocks[i]);
 
        if (cpu_has_pllb())
-               list_add_tail(&pllb.node, &clocks);
+               at91_clk_add(&pllb);
 
        if (cpu_has_uhp())
-               list_add_tail(&uhpck.node, &clocks);
+               at91_clk_add(&uhpck);
 
        if (cpu_has_udpfs())
-               list_add_tail(&udpck.node, &clocks);
+               at91_clk_add(&udpck);
 
        if (cpu_has_utmi())
-               list_add_tail(&utmi_clk.node, &clocks);
+               at91_clk_add(&utmi_clk);
 
        /* MCK and CPU clock are "always on" */
        clk_enable(&mck);
index 6cf4b78e175d7a47775463d03f4f6c7146a2910e..c2e63e47dcbece02cf2c9ea296b52476b59ef938 100644 (file)
@@ -6,6 +6,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/clkdev.h>
+
 #define CLK_TYPE_PRIMARY       0x1
 #define CLK_TYPE_PLL           0x2
 #define CLK_TYPE_PROGRAMMABLE  0x4
@@ -16,8 +18,7 @@
 struct clk {
        struct list_head node;
        const char      *name;          /* unique clock name */
-       const char      *function;      /* function of the clock */
-       struct device   *dev;           /* device associated with function */
+       struct clk_lookup cl;
        unsigned long   rate_hz;
        struct clk      *parent;
        u32             pmc_mask;
@@ -29,3 +30,18 @@ struct clk {
 
 
 extern int __init clk_register(struct clk *clk);
+extern struct clk mck;
+extern struct clk utmi_clk;
+
+#define CLKDEV_CON_ID(_id, _clk)                       \
+       {                                               \
+               .con_id = _id,                          \
+               .clk = _clk,                            \
+       }
+
+#define CLKDEV_CON_DEV_ID(_con_id, _dev_id, _clk)      \
+       {                                               \
+               .con_id = _con_id,                      \
+               .dev_id = _dev_id,                      \
+               .clk = _clk,                            \
+       }
index 50d46fa9ddb61189fbd02511d6dffb1075778ed3..ecba94ee520bb5424fd69a0d5c88e8fa1ae9f400 100644 (file)
@@ -8,6 +8,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/clkdev.h>
+
  /* Map io */
 extern void __init at91rm9200_map_io(void);
 extern void __init at91sam9260_map_io(void);
@@ -50,8 +52,20 @@ extern struct sys_timer at91x40_timer;
 
  /* Clocks */
 extern int __init at91_clock_init(unsigned long main_clock);
+/*
+ * function to specify the clock of the default console. As we do not
+ * use the device/driver bus, the dev_name is not intialize. So we need
+ * to link the clock to a specific con_id only "usart"
+ */
+extern void __init at91rm9200_set_console_clock(int id);
+extern void __init at91sam9260_set_console_clock(int id);
+extern void __init at91sam9261_set_console_clock(int id);
+extern void __init at91sam9263_set_console_clock(int id);
+extern void __init at91sam9rl_set_console_clock(int id);
+extern void __init at91sam9g45_set_console_clock(int id);
+extern void __init at91cap9_set_console_clock(int id);
+extern void __init at572d940hf_set_console_clock(int id);
 struct device;
-extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
 
  /* Power Management */
 extern void at91_irq_suspend(void);
diff --git a/arch/arm/mach-at91/include/mach/clkdev.h b/arch/arm/mach-at91/include/mach/clkdev.h
new file mode 100644 (file)
index 0000000..04b37a8
--- /dev/null
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif