Tighten Thumb1 branch predicate decoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137146 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 8ae8ce83424ed79134cb99c582f4a5efe5ab2520..42cd7ba9a6fe8a5190ad75d61b3dd098ac3f8ada 100644 (file)
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -592,6 +592,9 @@ static bool DecodeQPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
 static bool DecodePredicateOperand(llvm::MCInst &Inst, unsigned Val,
                                uint64_t Address, const void *Decoder) {
   if (Val == 0xF) return false;
+  // AL predicate is not allowed on Thumb1 branches.
+  if (Inst.getOpcode() == ARM::tBcc && Val == 0xE)
+    return false;
   Inst.addOperand(MCOperand::CreateImm(Val));
   if (Val == ARMCC::AL) {
     Inst.addOperand(MCOperand::CreateReg(0));

diff --git a/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt b/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt
index 7a27eb68bfeab40ab72fdb3e6204d45f4b158d9f..d2d424c1de491a5195fd342abc028559d8f96e1a 100644 (file)
--- a/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt
+++ b/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
-# XFAIL: *
 
 # Opcode=2249 Name=tBcc Format=ARM_FORMAT_THUMBFRM(25)
 #  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0