clk: rockchip: rk3368 plls' supports 1188MHz

Since HDMI needs clock rate 74.25MHz, so plls must support
a multiple of it.

For Rockchip rk3368 pll has better jetter with 1188MHz, so
add 1188MHz support.

Change-Id: I68c7333ae076ecabf8637298ee8ca43149cb17d1
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 669a5e233caefbd6c82857003c3b0337c11907f5..71f06b1c1aed147aa781a5567de4d3685363c6ac 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -67,6 +67,7 @@ static struct rockchip_pll_rate_table rk3368_pll_rates[] = {
        RK3066_PLL_RATE(1248000000, 1, 52, 1),
        RK3066_PLL_RATE(1224000000, 1, 51, 1),
        RK3066_PLL_RATE(1200000000, 1, 50, 1),
+       RK3066_PLL_RATE(1188000000, 2, 99, 1),
        RK3066_PLL_RATE(1176000000, 1, 49, 1),
        RK3066_PLL_RATE(1128000000, 1, 47, 1),
        RK3066_PLL_RATE(1104000000, 1, 46, 1),