ARM: shmobile: fix compile error when CONFIG_THUMB2_KERNEL=y

On KZM-A9-GT board (SMP), when CONFIG_THUMB2_KERNEL=y it fails to compile

  AS      arch/arm/mach-shmobile/headsmp-scu.o
/proj/koba/kernel/arm-soc/arch/arm/mach-shmobile/headsmp-scu.S: Assembler messages:
/proj/koba/kernel/arm-soc/arch/arm/mach-shmobile/headsmp-scu.S:41: Error: shift must be constant -- `bic r2,r2,r3,lsl r1'
make[2]: *** [arch/arm/mach-shmobile/headsmp-scu.o] Error 1
make[1]: *** [arch/arm/mach-shmobile] Error 2
make: *** [sub-make] Error 2

Instruction `bic r2,r2,r3,lsl r1' is not supported in thumb mode. This patch split it into 2 instructions.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
index 6f986546725892df07a62fd097ab363a4e7270f7..5ce416c090e191b0cee2e2f84128846b310971d5 100644 (file)
--- a/arch/arm/mach-shmobile/headsmp-scu.S
+++ b/arch/arm/mach-shmobile/headsmp-scu.S
@@ -38,7 +38,8 @@ ENTRY(shmobile_boot_scu)
        lsl     r1, r1, #3              @ we will shift by cpu_id * 8 bits
        ldr     r2, [r0, #8]            @ SCU Power Status Register
        mov     r3, #3
-       bic     r2, r2, r3, lsl r1      @ Clear bits of our CPU (Run Mode)
+       lsl     r3, r3, r1
+       bic     r2, r2, r3              @ Clear bits of our CPU (Run Mode)
        str     r2, [r0, #8]            @ write back
 
        b       shmobile_invalidate_start