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x86, cpu: Add cpufeature flag for PCIDs
author
Arun Thomas
<arun.thomas@gmail.com>
Fri, 19 Aug 2011 19:42:23 +0000
(21:42 +0200)
committer
H. Peter Anvin
<hpa@linux.intel.com>
Mon, 22 Aug 2011 20:52:32 +0000
(13:52 -0700)
This patch add a flag for Process-Context Identifiers (PCIDs) aka
Address Space Identifiers (ASIDs) aka Tagged TLB support.
Signed-off-by: Arun Thomas <arun.thomas@gmail.com>
Link:
http://lkml.kernel.org/r/1313782943-3898-1-git-send-email-arun.thomas@gmail.com
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
arch/x86/include/asm/cpufeature.h
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diff --git
a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 4258aac99a6e8b6493164929c3c75173cb2941c6..f24ed51c4b2d1400d3f7d66ea7358a36e24fff18 100644
(file)
--- a/
arch/x86/include/asm/cpufeature.h
+++ b/
arch/x86/include/asm/cpufeature.h
@@
-114,6
+114,7
@@
#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
#define X86_FEATURE_PDCM (4*32+15) /* Performance Capabilities */
+#define X86_FEATURE_PCID (4*32+17) /* Process Context Identifiers */
#define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */
#define X86_FEATURE_XMM4_1 (4*32+19) /* "sse4_1" SSE-4.1 */
#define X86_FEATURE_XMM4_2 (4*32+20) /* "sse4_2" SSE-4.2 */